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參數(shù)資料
| 型號(hào)： | USB97C223 |
| 廠商： | SMSC Corporation |
| 英文描述： | capacitor Selection for Internal Regulator Output Pins |
| 中文描述： | 電容的選擇內(nèi)部穩(wěn)壓器輸出引腳 |
| 文件頁數(shù)： | 51/59頁 |
| 文件大?。?/td> | 385K |
| 代理商： | USB97C223 |
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SMSC DS – USB97C201
Page 51
Rev. 03/25/2002
PRELIMINARY
RAMWR_A=0
RAMWR_B=0
RAMWR_
TOGGLE=0
Yes
No
Yes
A
SRAM Data
Received
Yes
No
No
RAMWR_A=1
RAMWR_B=0
RAMWR_
TOGGLE=1
RAMWR_A=0
RAMWR_B=1
RAMWR_
TOGGLE=0
B
SRAM Data
Received
A
SRAM Data
Received
Yes
Yes
No
No
RAMWR_A=1
RAMWR_B=1
(IN FLOW CONTROL
ACTIVE)
RAMWR_
TOGGLE=0
Yes
No
B
SRAM Data
Received
POR
No
A Buffer Output
Completed
No
B Buffer Output
Completed
Yes
Yes
CLEAR
RAMWR_A
CLR
RAMWR_B
A Buffer Output
Completed
No
Yes
B Buffer Output
Completed
CLR RAMWR_B;
Yes
No
RAMWR_TOGGLE=1;
(IN FLOW CONTROL
OFF)
CLR RAMWR_A;
CLR
RAMWR_TOGGLE;
(IN FLOW CONTROL OFF)
FIGURE 3 - RECEIVE BUFFER OPERATION
Trapezoidal shapes indicate actions performed by the firmware. The hardware state machine is responsible for
automatically changing the state of RAMWR_TOGGLE according to the state change of the RAMWR_B and
RAMWR_A bits, as shown in
Table 65
. These bits are normally set by the USB97C201 upon completion of loading
the A or B SRAM buffer and are normally cleared by the firmware (except when Auto Transfer operation is enabled,
see Section 6.9.3).
Note that when both buffers are “full”, ie RAMWR_A and RAMWR_B status bits are BOTH set, that the
RAMWR_TOGGLE is not altered and that flow control is initiated on the input source. If this source is the SIE, it will
NYET or NAK further OUTs. If it is the ATA interface, nDAK will not be asserted in response to DRQ and data not
clocked in to the SRAM.
Table 65 – RAMWR_TOGGLE State Control
RAMWR_B
RAMWR_A
0->1
RAMWR_TOGGLE
0->1
COMMENT
0
A buffer filled; B buffer empty;
change to B buffer buffer
B buffer filled, A buffer empty;
change to A buffer buffer
Both buffers filled; source flow
controlled.
Both buffers filled; source flow
controlled
B buffer emptied; A buffer full;
change to A buffer buffer.
A buffer emptied; B buffer full;
change to A buffer buffer.
0->1
0
1->0
1
0->1
No Change (0)
0->1
1
No Change (1)
1->0
1
X->1
1
1->0
X->0
6.9.2
TRANSMIT BUFFER OPERATION
Figure 4 illustrates the operation of the transmit A and B buffers.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USB97C223-NE | 制造商:SMSC 制造商全稱:SMSC 功能描述:Bus Powered USB 2.0 Flash Media Controller |
| USB97C223-NU | 制造商:SMSC 制造商全稱:SMSC 功能描述:Bus Powered USB 2.0 Flash Media Controller |
| USB97C242 | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 Flash Drive Controller |
| USB97C242-MN | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 Flash Drive Controller |
| USB97C242-MN-03 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMSC 功能描述: |
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