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SMSC DS – USB97C201
Page 3
Rev. 03/25/2002
PRELIMINARY
TABLE OF CONTENTS
1.0
GENERAL DESCRIPTION.................................................................................................................................. 6
2.0
PIN TABLE.......................................................................................................................................................... 7
3.0
PIN CONFIGURATION........................................................................................................................................ 8
QFP/TQFP 100 Pin..........................................................................................................................8
3.1
4.0
BLOCK DIAGRAM.............................................................................................................................................. 9
5.0
PIN DESCRIPTIONS......................................................................................................................................... 10
BUFFER TYPE DESCRIPTIONS...................................................................................................13
5.1
6.0
FUNCTIONAL BLOCK DESCRIPTIONS.......................................................................................................... 14
MCU ...............................................................................................................................................14
6.1.1
MCU Memory Map: Code Space...........................................................................................14
6.1.2
MCU Memory Map: XData Space..........................................................................................15
6.1.3
MCU Block Register Summary..............................................................................................16
6.1.4
MCU Register Descriptions....................................................................................................19
6.2
SIE Block.......................................................................................................................................42
6.2.1
Autonomous USB Protocol....................................................................................................42
6.2.2
USB Events............................................................................................................................43
6.2.3
Standard Device Requests....................................................................................................44
6.2.4
SIE Configurations.................................................................................................................44
6.3
IDE Controller Description...........................................................................................................44
6.3.1
IDE Configurations.................................................................................................................45
6.3.2
PIO IDE Operations...............................................................................................................45
6.3.3
PIO IDE Data Prefetching and Posting..................................................................................45
6.3.4
DMA Transfers.......................................................................................................................46
6.3.5
Ultra ATA/66 Synchronous DMA Operation...........................................................................46
6.3.6
Ultra ATA/66 Operation..........................................................................................................47
6.4
SRAM Buffers................................................................................................................................48
6.5
8051 Options.................................................................................................................................48
6.6
Address Multiplexing ...................................................................................................................48
6.7
SRAM Time Multiplexer Operation .............................................................................................49
6.7.1
Phase 0 (0)..........................................................................................................................49
6.7.2
Phase 1 (1)..........................................................................................................................49
6.7.3
Phase 2 (2)..........................................................................................................................49
6.7.4
Phase 3 (3)..........................................................................................................................49
6.8
EP2 SRAM Buffer Operation........................................................................................................49
6.9
EP2 Automatic Buffer Operations...............................................................................................50
6.9.1
Receive Auto-Toggle .............................................................................................................50
6.9.2
Transmit Buffer Operation .....................................................................................................51
6.9.3
Automatic Transfer Operation................................................................................................52
6.1
7.0
DC PARAMETERS............................................................................................................................................ 54
8.0
AC SPECIFICATIONS....................................................................................................................................... 56
ATA/ATAPI.....................................................................................................................................56
USB2.0 Timing..............................................................................................................................56
8.1
8.2
9.0
PACKAGING..................................................................................................................................................... 57
10.0
USB97C201 REVISIONS.............................................................................................................................. 59