參數(shù)資料
型號: USB3450
廠商: SMSC Corporation
英文描述: HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE
中文描述: 高速USB主機或設(shè)備與UTMI接口物理層
文件頁數(shù): 34/40頁
文件大?。?/td> 1086K
代理商: USB3450
Hi-Speed USB Host or Device PHY With UTMI+ Interface
Datasheet
Revision 0.1 (05-11-05)
34
SMSC USB3450
DATASHEET
Figure 7.5 HS Detection Handshake Timing Behavior (HS Mode)
Table 7.7 Reset Timing Values
TIMING
PARAMETER
DESCRIPTION
VALUE
T0
HS Handshake begins. DP pull-up enabled, HS
terminations disabled.
0 (reference)
T1
Device asserts Chirp K on the bus.
T0 < T1 < HS Reset T0 + 6.0ms
T2
Device removes Chirp K from the bus. 1 ms
minimum width.
T0 + 1.0ms < T2 <
HS Reset T0 + 7.0ms
T3
Downstream facing port asserts Chirp K on the
bus.
T2 < T3 < T2+100μs
T4
Downstream facing port toggles Chirp K to Chirp J
on the bus.
T3 + 40μs < T4 < T3 + 60μs
T5
Downstream facing port toggles Chirp J to Chirp K
on the bus.
T4 + 40μs < T5 < T4 + 60μs
T6
Device detects downstream port chirp.
T6
T7
Chirp detected by the device. Device removes DP
pull-up and asserts HS terminations, reverts to HS
default state and waits for end of reset.
T6 < T7 < T6 + 500μs
T8
Terminate host port Chirp K-J sequence (Repeating
T4 and T5)
T9 - 500μs < T8 < T9 - 100μs
T9
The earliest time at which host port may end reset.
The latest time, at which the device may remove
the DP pull-up and assert the HS terminations,
reverts to HS default state.
HS Reset T0 + 10ms
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