參數(shù)資料
型號: USB3450
廠商: SMSC Corporation
英文描述: HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE
中文描述: 高速USB主機或設(shè)備與UTMI接口物理層
文件頁數(shù): 13/40頁
文件大?。?/td> 1086K
代理商: USB3450
Hi-Speed USB Host or Device PHY With UTMI+ Interface
Datasheet
SMSC USB3450
13
Revision 0.1 (05-11-05)
DATASHEET
22
DATA[7]
I/O,
CMOS,
Pull-low
N/A
8-bit bi-directional data bus. Data[7] is the MSB and
Data[0] is the LSB.
23
DATA[6]
I/O,
CMOS,
Pull-low
N/A
24
DATA[5]
I/O,
CMOS,
Pull-low
N/A
25
DATA[4]
I/O,
CMOS,
Pull-low
N/A
26
DATA[3]
I/O,
CMOS,
Pull-low
N/A
27
DATA[2]
I/O,
CMOS,
Pull-low
N/A
28
DATA[1]
I/O,
CMOS,
Pull-low
N/A
29
DATA[0]
I/O,
CMOS,
Pull-low
N/A
30
RXVALID
Output
High
Receive Data Valid. Indicates that the DATA bus has
received valid data. The Receive Data Holding
Register is full and ready to be unloaded. The Link
is expected to register the DATA bus on the rising
edge of CLKOUT.
31
HOST
Input
N/A
Host Pull-down Select. This signal enables the 15k
Ohm pull-down resistor on the DM line.
0: Pull-down resistor not connected to DM
1: Pull-down resistor connected to DM
32
RXERROR
Output
High
Receive Error. This output is clocked with the same
timing as the receive DATA lines and can occur at
anytime during a transfer.
0: Indicates no error.
1: Indicates a receive error has been detected.
33
VDD3.3
N/A
N/A
3.3V PHY Supply. Provides power for Hi-Speed
Transceiver, UTMI+ Digital, Digital I/O, and
Regulators.
34
VDD1.8
N/A
N/A
1.8V regulator output for digital circuitry on chip.
Place a 4.7uF low ESR capacitor near this pin and
connect the capacitor from this pin to ground.
Connect pin 34 to pin 19. See
Section 6.6.1,
"Internal Regulators"
.
35
XO
Output,
Analog
N/A
Crystal pin. If using an external clock on XI this pin
should be floated.
Table 3.1 USB3450 Pin Definitions (continued)
PIN
NAME
DIRECTION,
TYPE
ACTIVE
LEVEL
DESCRIPTION
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