
35
CHAPTER 1
OVERVIEW
User’s Manual U13570EJ3V1UD
1.1
Features
On-chip ROM correction (
PD784218A, 784218AY Subseries only)
Inherits the peripheral functions of the
PD78078 Subseries
Minimum instruction execution time
160 ns (main system clock: fXX = 12.5 MHz operation)
61
s (subsystem clock: fXT = 32.768 kHz operation)
Instruction set suited for control applications
Interrupt controller (4-level priority)
Vectored interrupt servicing, macro service, and context switching
Standby function
HALT, STOP, and IDLE modes
In the low power consumption mode: HALT and IDLE modes (subsystem clock operation)
On-chip memory: Mask ROM
256 KB (
PD784218A, 784218AY)
192 KB (
PD784217A, 784217AY)
128 KB (
PD784215A, 784216A, 784215AY, 784216AY)
96 KB (
PD784214A, 784214AY)
Flash memory 256 KB (
PD78F4218A, 78F4218AY)
128 KB (
PD78F4216A, 78F4216AY)
RAM
12,800 bytes (
PD784217A, 784218A, 784217AY, 784218AY, 78F4218A,
78F4218AY)
8,192 bytes (
PD784216A, 784216AY, 78F4216A, 78F4216AY)
5,120 bytes (
PD784215A, 784215AY)
3,584 bytes (
PD784214A, 784214AY)
I/O pins: 86
Software programmable pull-up resistors: 70 inputs
LED direct drive possible:
22 outputs
Transistor direct drive possible:
6 outputs
Timer/counter: 16-bit timer/counter × 1 unit
8-bit timer/counter
× 6 units
Watch timer: 1 channel
Watchdog timer: 1 channel
Serial interfaces
UART/IOE (3-wire serial I/O): 2 channels (on-chip baud rate generator)
CSI (3-wire serial I/O, multimaster compatible I2C busNote): 1 channel
A/D converter: 8-bit resolution × 8 channels
D/A converter: 8-bit resolution × 2 channels
Real-time output port (by combining with the timer/counter, two stepping motors can be independently controlled)
Clock frequency function
Clock output function: Select from fXX, fXX/2, fXX/22, fXX/23, fXX/24, fXX/25, fXX/26, fXX/27, and fXT
Buzzer output function: Select from fXX/210, fXX/211, fXX/212, and fXX/213
Power supply voltage: VDD = 1.8 to 5.5 V (mask ROM version)
VDD = 1.9 to 5.5 V (flash memory version)
Note Only in the
PD784216AY, 784218AY Subseries