參數(shù)資料
型號(hào)： UPD75P216A
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述： 4位單片機(jī)
文件頁數(shù)： 6/28頁
文件大?。?/td> 281K
代理商： UPD75P216A
μ
PD75P216A
6
Edge detection vectored interrupt input with noise
elimination function (edge-detection selectable)
1.2
NON-PORT PINS
Input/
output
Shared
pin
I/O circuit
type
Note 1
Used for digit output
Can withstand high voltage and high current
T10/S15 -
T13/S12
For digit/segment output
Can withstand high voltage and high current
Unused pin can be used as PORTH.
PH3-PH0
T14/S11,
T15/S10
For digit/segment output
Can withstand high voltage and high current
Static output is possible.
High
impedance
Note 3
I - D
For segment output
Can withstand high voltage
Static output is possible
S9
—
For segment output
Can withstand high voltage
High
impedance
TI0
Input
P13
External event pulse input to timer event counter
B
SCK
I/O
P01
Input and output to serial clock
Input
F
SO
I/O
P02
Serial data output or serial data input and output
Input
G
SI
Input
P03
Serial data input or normal input
Input
B
Edge detection vectored interrupt input
(detected at both rising edge and falling edge)
INT0
P10/V
PP
INT1
P11
Testable input for edge-detection
(detected at rising edge)
Fixed frequency output
(For buzzer or system clock trimming)
Crystal/ceramic resonator connection for main
system clock generation. When external clock
signal is used, it is applied to X1, and its reverse
phase signal is applied to X2.
XT1
Input
Crystal connection for subsystem clock generation.
When external clock signal is used, it is applied to
XT1 and XT2 is open.
—
—
—
XT2
—
RESET
Input
—
System reset input (low-level active)
—
B
Operation mode selection during the PROM
write/verify cycles.
+12.5 V is applied as the programming voltage
during the PROM write/verify cycles
Pull-down resistor connection of FIP
controller/driver
Positive power supply
+6 V is applied as the programming voltage during
the PROM write/verify cycles
V
DD
—
—
—
V
SS
—
GND potential
—
—
NC
Note 4
—
No connection
—
—
Note 1.
The circle ( ) indicates the Schmitt triggered input.
2.
Pull-down resistor is incorporated.
3.
Open-drain output
4.
NC pin should be connected to V
PRE
when sharing print board with the
μ
PD75216A.
Pin name
Function
When reset
T0 - T9
—
Note 2
Low level
I - E
S0 -S8
Note 2
Low level
I - E
Output
PPO
Output
—
Pulse output by timer/pulse generator
D
INT4
Input
P00
—
B
Input
—
B
V
LOAD
—
—
I - E
V
PP
P10/INT0
—
B
MD0 - MD3
I/O
P30 - P33
—
E
INT2
Input
P12
—
B
BUZ
I/O
P23
Input
E
X1, X2
Input
—
—
—
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