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CHAPTER 3 CPU FUNCTION
User’s Manual U16541EJ5V1UD
90
(1) Setting data to special registers
Set data to the special registers in the following sequence.
<1>
Disable DMA operation.
<2>
Prepare data to be set to the special register in a general-purpose register.
<3>
Write the data prepared in <2> to the PRCMD register.
<4>
Write the setting data to the special register (by using the following instructions).
Store instruction (ST/SST instruction)
Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
(<5> to <9> Insert NOP instructions (5 instructions).)
Note
<10>
Enable DMA operation if necessary.
[Example] With PSC register (setting standby mode)
ST.B r11, PSMR[r0]
;
Set PSMR register (setting IDLE1, IDLE2, and STOP modes).
<1>CLR1 0, DCHCn[r0]
;
Disable DMA operation. n = 0 to 3
<2>MOV0x02, r10
<3>ST.B r10, PRCMD[r0] ;
Write PRCMD register.
<4>ST.B r10, PSC[r0]
;
Set PSC register.
<5>NOP
Note
;
Dummy instruction
<6>NOP
Note
;
Dummy instruction
<7>NOP
Note
;
Dummy instruction
<8>NOP
Note
;
Dummy instruction
<9>NOP
Note
;
Dummy instruction
<10>SET1 0, DCHCn[r0]
;
Enable DMA operation. n = 0 to 3
(next instruction)
There is no special sequence to read a special register.
Note Five NOP instructions or more must be inserted immediately after setting the IDLE1 mode, IDLE2
mode, or STOP mode (by setting the PSC.STP bit to 1).
Cautions 1. When a store instruction is executed to store data in the command register, interrupts are
not acknowledged. This is because it is assumed that steps <3> and <4> above are
performed by successive store instructions. If another instruction is placed between <3>
and <4>, and if an interrupt is acknowledged by that instruction, the above sequence may
not be established, causing malfunction.
2. Although dummy data is written to the PRCMD register, use the same general-purpose
register used to set the special register (<4> in Example) to write data to the PRCMD
register (<3> in Example). The same applies when a general-purpose register is used for
addressing.