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APPENDIX D REVISION HISTORY
User’s Manual U14492EJ5V0UD
816
(3/13)
Edition
Major Revision from Previous Edition
Applied to:
Addition of
Caution
in
7.3.8 (3) Valid edge selection register (SESC)
Addition of Caution and addition of
Caution
in bit description in
7.3.8 (4) Timer 2 input
filter mode registers 0 to 5 (FEM0 to FEM5)
Modification of description in
Figure 7-14 Pipeline Operation at Interrupt Request
Acknowledgement (Outline)
Addition and modification of description in
7.8 Periods in Which Interrupts Are Not
Acknowledged
CHAPTER 7
INTERRUPT/
EXCEPTION
PROCESSING
FUNCTION
Modification of description in
8.3.1 Direct mode
Addition of description on
Caution
in
8.3.2 PLL mode
Modification of description on bit that can be manipulated and data setting sequence to
CKC, and modification of
Caution
in
8.3.4 Clock control register (CKC)
Modification of register symbol and initial value in
8.4 PLL Lockup
Modification of
Note
in
Figure 8-1 Power Save Mode State Transition Diagram
Modification of data setting sequence to PSC and
Caution
in
8.5.2 (3) Power save
control register (PSC)
Modification of description in
Table 8-4 Operation Status in IDLE Mode
Addition of
Note
and addition and modification of description in
8.5.4 (2) Release of IDLE
mode
Modification of description in
Table 8-6 Operation Status in Software STOP Mode
Addition of
Note
and addition and modification of description in
8.5.5 (2) Release of
software STOP mode
Addition and modification of description and modification of timing chart in
8.6.1 (1)
Securing the time using an on-chip time base counter
Modification of timing chart in
8.6.1 (2) Securing the time according to the signal level
width (RESET pin input)
Modification of description in
Table 8-8 Counting Time Examples (f
XX
= 10
×
f
X
)
CHAPTER 8
CLOCK
GENERATION
FUNCTION
Modification of
Figure 9-1 Block Diagram of Timer 0 (Mode 0: Symmetric Triangular
Wave, Mode 1: Asymmetric Triangular Wave)
Modification of
Figure 9-2 Block Diagram of Timer 0 (Mode 2: Sawtooth Wave)
Addition of
Caution
in
Table 9-1 Timer 0 Operation Modes
Addition of
Caution
in
9.1.3 (3) Dead-time timer reload registers 0, 1 (DTRR0, DTRR1)
Modification of bit names in
9.1.4 (2) Timer control registers 00, 01 (TMC00, TMC01)
Addition of description, modification of bit names, and addition of
Caution
in bit description
in
9.1.4 (3) Timer unit control registers 00, 01 (TUC00, TUC01)
Addition of bit names and bit descriptions in
9.1.4 (4) Timer output mode registers 0, 1
(TOMR0, TOMR1)
Addition of
Figure 9-7 Output Waveforms of TO000 and TO001 in PWM Mode 0
(Symmetric Triangular Waves) (Without Dead Time (TM0CED0 Bit = 1))
Addition of
Figure 9-8 Output Waveforms of TO000 and TO001 in PWM Mode 0
(Symmetric Triangular Waves) (With Dead Time (TM0CED0 Bit = 0))
2nd
edition
Modification of bit names in
9.1.4 (5) PWM output enable registers 0, 1 (POER0,
POER1)
CHAPTER 9
TIMER/COUNTER
FUNCTION (REAL-
TIME PULSE UNIT)