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參數(shù)資料
| 型號： | UPD703032AYGF-XXX-3BA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 15/54頁 |
| 文件大小： | 507K |
| 代理商： | UPD703032AYGF-XXX-3BA |
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Data Sheet U14893EJ2V0DS
20
PD703032A, 703032AY, 70F3032A, 70F3032AY
Recommended Oscillator
(1) Main clock oscillator (TA = –40 to +85 °C)
(a) Connection of ceramic resonator or crystal resonator
X2
X1
C2
Rf
Rd
C1
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Oscillation frequency
fXX
220
MHz
–
Upon reset release
2
19/fXX
s
Oscillation stabilization time
–
Upon STOP mode release
Note
s
Note The TYP. value differs depending on the setting of the oscillation stabilization time select register (OSTS).
Cautions 1. The main clock oscillator operates on the output voltage of the on-chip regulator (3.3 V).
External clock input is prohibited.
2. When using the main clock oscillator, wire as follows in the area enclosed by the broken
lines in the above figure to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as VSS.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
3. Ensure that the duty of oscillation waveform is between 5.5 and 4.5.
4. Sufficiently evaluate the matching between the
PD703032A, 703032AY, 70F3032A,
70F3032AY and the resonator.
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