參數(shù)資料
型號: UPD6604
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION
中文描述: 4位單片機的紅外遙控傳輸
文件頁數(shù): 26/64頁
文件大?。?/td> 268K
代理商: UPD6604
26
μ
PD6604
Data Sheet U11281EJ3V0DS00
6. RESET PIN
The system reset takes effect by inputting low level to the RESET pin.
While the RESET pin is at low level, the system clock oscillator is stopped and the OSC
OUT
pin is fixed to high-
impedance, the OSC
IN
pin is fixed to the GND.
If the RESET pin is raised from low level to high level, it executes the program from the 0 address after counting
60 to 116 of the system clock (f
OSC
).
Figure 6-1. Reset Operation by RESET Input
Wait
(60 to 116)/f
OSC
HALT mode
Oscillation
stopped
OPERATING mode or
STANDBY mode
RESET
0 address start
OPERATING
mode
The RESET pin outputs low level when the POC circuit (mask option) is in operation.
Caution When connecting a reset IC to the RESET pin, ensure that the IC is of the N-ch open-drain output
type.
Table 6-1. Hardware Statuses After Resetting
RESET Input in Operation
Resetting by Internal POC Circuit in Operation
Resetting by Other Factors
Note 1
RESET Input During STANDBY Mode
Resetting by the Internal POC Circuit During
STANDBY Mode
Hardware
PC (10 bits)
000H
SP (1 bit)
0B
Data
R0 = DP
000H
memory
R1-RF
Undefined
Previous status retained
Accumulator (A)
Undefined
Status flag (F)
Carry flag (CY)
0B
Timer (10 bits)
000H
Port register
P0
FFH
P1
×
FH
Note 2
03H
Control register P3
P4
26H
Notes 1.
The following resets are available.
Reset when executing the HALT instruction (when the operand value is illegal or does not satisfy
the precondition)
Reset when executing the RLZ instruction (when A = 0)
Reset by stack pointer’s overflow or underflow
2.
Refers to the value by the K
I
pin status.
In order to prevent malfunction, be sure to input a low level to more than one of pins K
I0
to K
I3
when
reset is released (when RESET pin changes from low level to high level, or POC is released due to
supply voltage startup).
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