- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄225472 > UPD44325084F5-E50-EQ2-A 4M X 8 QDR SRAM, 0.45 ns, PBGA165 PDF資料下載
參數(shù)資料
| 型號： | UPD44325084F5-E50-EQ2-A |
| 元件分類： | SRAM |
| 英文描述： | 4M X 8 QDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165 |
| 文件頁數(shù)： | 7/40頁 |
| 文件大?。?/td> | 387K |
| 代理商： | UPD44325084F5-E50-EQ2-A |
第1頁第2頁第3頁第4頁第5頁第6頁當前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
15
Data Sheet
M16784EJ4V0DS
μPD44325084, 44325094, 44325184, 44325364
Byte Write Operation
[
μPD44325084]
Operation
K
K#
NW0#
NW1#
Write D0 to D7
L
→ H
–
0
–
L
→ H
0
Write D0 to D3
L
→ H
–
0
1
–
L
→ H
0
1
Write D4 to D7
L
→ H
–
1
0
–
L
→ H
1
0
Write nothing
L
→ H
–
1
–
L
→ H
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. NW0# and NW1# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
[
μPD44325094]
Operation
K
K#
BW0#
Write D0 to D8
L
→ H
–
0
–
L
→ H
0
Write nothing
L
→ H
–
1
–
L
→ H
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# can be altered for any portion of the BURST WRITE
operation provided that the setup and hold requirements are satisfied.
[
μPD44325184]
Operation
K
K#
BW0#
BW1#
Write D0 to D17
L
→ H
–
0
–
L
→ H
0
Write D0 to D8
L
→ H
–
0
1
–
L
→ H
0
1
Write D9 to D17
L
→ H
–
1
0
–
L
→ H
1
0
Write nothing
L
→ H
–
1
–
L
→ H
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# and BW1# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPFS120P | P-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| UPL40-U1BT | CABLE TERMINATED, MALE, TNC CONNECTOR, PLUG |
| UPN2AS | FEMALE-FEMALE-MALE, RF Y ADAPTER |
| UPRLED630 | SINGLE COLOR LED, BRIGHT RED, 1.4732 mm |
| UPVLED | SINGLE COLOR LED, ULTRA VIOLET, 1.47 mm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD44325092BF5-E40-FQ1-A | 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 36M-Bit 4M x 9-Bit 0.45ns 165-Pin BGA |
| UPD44325094BF5-E40-FQ1 | 制造商:Renesas Electronics Corporation 功能描述:IC SRAM QDRII 36MBIT 165BGA |
| UPD44325094BF5-E40-FQ1-A | 制造商:Renesas Electronics Corporation 功能描述:IC SRAM QDRII 36MBIT 165BGA |
| UPD44325182BF5-E33-FQ1-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD44325182BF5-E40-FQ1 | 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin BGA 制造商:Renesas Electronics Corporation 功能描述:36MB, B2 QDRII SRAM - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復。