參數(shù)資料
型號(hào): UPD42S18165L
廠商: NEC Corp.
英文描述: 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, EDO, BYTE READ/WRITE MODE
中文描述: 3.3 V工作16 m位動(dòng)態(tài)隨機(jī)存儲(chǔ)器1個(gè)M字由16位,江戶,字節(jié)讀/寫模式
文件頁數(shù): 4/48頁
文件大小: 319K
代理商: UPD42S18165L
μ
PD42S18165L, 4218165L
4
Block Diagram
Clock Generator
RAS
LCAS
UCAS
WE
V
CC
GND
CAS before
RAS Counter
Row
Address
Buffer
Column
Address
Buffer
A0
to
A9
R
Memory
Cell
Array
Sense Amplifier
Column Decoder
Lower
Byte
Control
Upper
Byte
Control
Data
Output
Buffer
Data
Input
Buffer
Data
Output
Buffer
Data
Input
Buffer
×
16
OE
I/O1
to
I/O8
(Lower Byte)
I/O9
to
I/O16
(Upper Byte)
1,024
×
1,024
×
16
X0 to X9
Y0 to Y9
1
1,024
×
16
1,024
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