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參數資料
| 型號： | UPD2845GR-E1 |
| 廠商： | NEC Corp. |
| 英文描述： | 1 V, 1.3 mA, 94MHz PLL SYNTHESIZER LSI FOR PAGER SYSTEM |
| 中文描述： | 1伏，1.3毫安，94MHz PLL頻率合成器大規(guī)模集成電路的尋呼系統(tǒng) |
| 文件頁數： | 15/16頁 |
| 文件大小： | 144K |
| 代理商： | UPD2845GR-E1 |
15
P
PD2845GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devides.
(2) Form a ground pattern as wide as possible to minimize ground impedance.
(3) Connect a bypass capacitor (e. g. 1 000 pF) to the V
DD
pin.
(4) The DC cut capacitor must be each attached to F
IN
, XI and XO pin.
(5) External R, C values of loop filter should be determined according to the VCO specification.
(6) While VCO signal is not input to F
IN
pin, power-save-mode must be set.
(7) After initially V
CC
, V
DD
are supplied, serial data should be input immediately. (Before serial data input, LSI
operation is unstable or undesired.)
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and conditions
than the recommended conditions are to be consulted with our sales representatives.
P
PD2845GR
Soldering process
Soldering conditions
Symbol
Infrared ray reflow
Peak package’s surface temperature: 235 °C or below,
Reflow time: 30 seconds or below (210 °C or higher),
Number of reflow process: 2, Exposure limit*: None
IR35-00-2
VPS
Peak package’s surface temperature: 215 °C or below,
Reflow time: 40 seconds or below (200 °C or higher),
Number of reflow process: 2, Exposure limit*: None
VP15-00-2
Partial heating method
Terminal temperature: 300 °C or below,
Flow time: 3 seconds or below, Exposure limit*: None
*:
Exposure limit before soldering after dry-package is opened.
Storage conditions: 25 °C and relative humidity at 65 % or less.
Note
Apply only a single process at once, except for “Partial heating method”.
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
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