參數(shù)資料
型號： UPD168113K9-9B4-A
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT
中文描述： 馬鞍山集成電路
文件頁數(shù)： 38/50頁
文件大?。?/td> 771K
代理商： UPD168113K9-9B4-A
Data Sheet S16423EJ2V0DS
38
μ
PD168113
11.7.10 Example of acceleration/deceleration operation
(1) Acceleration valid/deceleration valid
Set pulses
Acceleration/
deceleration pulses
P
(2) Acceleration valid/deceleration invalid
P
(3) Acceleration invalid/deceleration invalid
P
(4) Acceleration invalid/deceleration valid
P
(1’) Acceleration valid/deceleration valid
Note1
Set pulses
Condition: Set pulses/2 < acceleration/deceleration pulses
P
(2’) Acceleration valid/deceleration invalid
Note2
Condition: Set pulses < acceleration/deceleration pulses
P
(4’) Acceleration invalid/deceleration valid
Note3
Condition: Set pulses < acceleration/deceleration pulses
P
The left side figures in upper figures show the ideal operation waveform. If the number of set pulses is less than the
number of acceleration/deceleration control pulses, the operation as the right side figures in upper figures.
Notes 1.
The deceleration operation is stared when 1/2 of the set number of pulses has been reached during the
acceleration operation. Therefore, acceleration and deceleration are always mirrored.
2.
If the set number of pulses is less than the number of acceleration/deceleration control pulses during only
the acceleration operation, the operation is stopped at the pulse rate in the middle of acceleration.
3.
If the set number of pulses is less than the number of acceleration/deceleration control pulses during only
the deceleration operation, the last pulse rate does not reach the target value. The set number of pulses is
output in accordance with the deceleration pulse curve, and the operation is stopped.
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