參數(shù)資料
型號: UPD168113K9-9B4-A
廠商: NEC Corp.
英文描述: MOS INTEGRATED CIRCUIT
中文描述: 馬鞍山集成電路
文件頁數(shù): 28/50頁
文件大?。?/td> 771K
代理商: UPD168113K9-9B4-A
Data Sheet S16423EJ2V0DS
28
μ
PD168113
11.5.3 Brake mode
D2 is used to select the output status in the stop mode.
D2 = 0: The output goes into a Hi-Z state.
D2 = 1: The high side of both phase A and B is ON, and the short brake status is selected. At this time, the output
goes H.
D2
Operation Mode
0
Hi-Z
1
Short brake (both phases A and B output H)
11.5.4 Output duty setting
The output duty for current control is selected, and can be selected in 32 steps by data of D3 to D7.
The operation frequency of the output is set by counting the external CLK.
Operation frequency = 1/ (200 ns x 32) = 156.25 kHz (at 5 MHz)
D7......D3
Output Duty (%)
D7......D3
Output Duty (%)
00000
100
10000
50
00001
3.125
10001
53.125
00010
6.25
10010
56.25
00011
9.375
:
:
:
:
11110
93.75
01111
46.875
11111
96.875
Caution When all of D3 to D7 is 0, the output duty is 100%. Be sure to use the stop mode when the output
duty is 0%.
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