參數(shù)資料
型號: UPD16682W
廠商: NEC Corp.
英文描述: 1/65 DUTY LCD CONTROLLER/DRIVER WITH ON-CHIP RAM
中文描述: 1 / 65稅LCD控制器/驅(qū)動(dòng)器,片內(nèi)RAM
文件頁數(shù): 38/56頁
文件大小: 435K
代理商: UPD16682W
Data Sheet S13368EJ3V0DS00
38
μ
PD16682
Table 12
1. List of
μ
PD16682 Commands (1/2)
Command
Command code
Function
A0
/RD
/WR
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Display ON/OFF
0
1
0
1
0
1
0
1
1
1
0
1
Sets LCD’s ON/OFF status
0: OFF, 1: ON
Display start line set
0
1
0
0
1
Display start address
Sets display RAM’s
display start line address
Page address set
0
1
0
1
0
1
1
Page address
Sets display RAM’s page
address
Column address set
(high-order bits)
0
1
0
0
0
0
1
High-order column address
Sets high-order four bits
of display RAM’s column
address
Column address set
(low-order bits)
0
1
0
0
0
0
0
Low-order column address
Sets low-order four bits
display RAM’s column
address
Status read
0
0
1
0
Status
0
0
0
0
Read status information
Display data write
1
1
0
Write data
Writes to display RAM
Display data read
1
0
1
Read data
Reads from display RAM
ADC select
0
1
0
1
0
1
0
0
0
0
0
1
Sets correspondence of
SEG output to display
RAM address
0: Normal, 1: Inverted
Display
normal/inverted
0
1
0
1
0
1
0
0
1
1
0
1
Sets normal/inverted
direction of display
Display all ON/OFF
0
1
0
1
0
1
0
0
1
0
0
1
Sets display all ON
0: Normal display, 1: All
ON
LCD bias set
0
1
0
1
0
1
0
0
0
1
0
1
Sets the bias setting of
the LCD drive voltage
0: 1/9 bias, 1: 1/7 bias
Read modify write
0
1
0
1
1
1
0
0
0
0
0
Specifies incrementation
of the column address
During write: +1,
During read: 0
End
0
1
0
1
1
1
0
1
1
1
0
Cancels read modify
write
Reset
0
1
0
1
1
1
0
0
0
1
0
Sets an internal reset
Selects scan
direction for COM
outputs
0
1
0
1
1
0
0
0
1
X
X
X
X
X
X
Selects scan direction for
COM outputs
0: Normal (forward),
1: Inverted (reverse)
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