參數(shù)資料
型號: UPD161401
廠商: NEC Corp.
英文描述: 256-COLOR, 1/80-DUTY LCD CONTROLLER/DRIVER WITH ON-CHIP RAM
中文描述: 256色,1/80-DUTY LCD控制器/驅(qū)動器,片內(nèi)RAM
文件頁數(shù): 17/124頁
文件大?。?/td> 647K
代理商: UPD161401
Data Sheet S15726EJ2V0DS
17
μ
PD161401
5. FUNCTIONAL DESCRIPTION
5.1 CPU Interface
5.1.1 Selecting interface type
The
μ
PD161401 transfers data through an 8-bit bi-directional data bus (D
7
to D
0
), a 16-bit bi-directional data bus (D
15
to D
0
), or a serial data input (SI) pin. Interface type can be selected by making the IFM1,IFM0 pin high or low, as shown
in the following table.
IFM1
IFM0
Interface type
L
L
Serial data input
L
H
Setting Prohibited
H
L
i80 system CPU
H
H
M68 system CPU
Parallel data input or serial data input can be chosen as by setting the polarity of IFM1 terminal, as shown in the
following table.
IFM1
/CS1, CS2
RS
/RD
/WR
D
15
to D
8
D
7
D
6
D
5
to D
0
H: Parallel input
/CS1, CS2
RS
/RD
/WR
D
15
to D
8
Hi-Z
Note2
D
7
D
6
D
5
to D
0
Hi-Z
Note2
L: Serial input
/CS1, CS2
RS
Note1
Note1
SI
SCL
Notes 1. Fix these pins to the high or low level.
2. Hi-Z: High impedance
5.1.2
Parallel interface
When the parallel interface is selected (IFM = H), an 8-bit bi-directional data bus (D
7
to D
0
) or 16-bit bi-directional data
bus (D
15
to D
0
) can be selected by setting the BMOD flag of the control register 2 (R1) to 1 or 0. In addition, the
μ
PD161401 can be directly connected to an i80 or M68 system by making the IFM0 pin high or low as shown in the
following table.
IFM0
/CS1, CS2
RS
/RD
/WR
BMOD
D
15
to D
8
D
7
to D
0
RS
E
R,/W
0
D
15
to D
8
D
7
to D
0
H: M68 system CPU
/CS1, CS2
1
Hi-Z
Note
D
7
to D
0
RS
/RD
/WR
0
D
15
to D
8
D
7
to D
0
L: i80 system CPU
/CS1, CS2
1
Hi-Z
Note
D
7
to D
0
Note
Hi-Z : High impedance (may be open)
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