參數(shù)資料
型號： uPC1853CT-01
廠商： NEC Corp.
英文描述： MATRIX SURROUND IC WITH I2C BUS
中文描述： 矩陣環(huán)繞集成電路I2C總線
文件頁數(shù)： 18/76頁
文件大?。?/td> 544K
代理商： UPC1853CT-01
μ
PC1853
18
3.1.2 Stop condition
Stop condition is made by rising of SDA from “Low” to “High” during SCL is “High” as shown in
Fig. 3-2
.
When this stop condition is received, the
μ
PC1853 stops to take in or output the data.
Fig. 3-2 Start/Stop Condition of Data Transfer
μ
s
4.0
MIN.
μ
s
4.7
MIN.
3.5 V
1.5 V
3.5 V
1.5 V
START
SDA
SCL
STOP
3.1.3 Data transfer
In the case of data transfer, data changing should be executed while SCL is “Low” like Fig.
3-3
. When SCL is “High”,
be sure not to change the data.
Fig. 3-3 Data Transfer
Note 1
Note 2
SDA
SCL
Note 1.
Data hold time for I
2
C device: 300 ns MIN., Data hold time for CPU: 5
μ
s MIN.
2.
Data set-up time: 250 ns MIN.
Remark
Clock frequency: 0 to 100 kHz
3.2 Data Transfer Format
Fig. 3-4
is an example of data transfer in write mode.
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