參數(shù)資料
型號(hào): uPC1853CT-01
廠商: NEC Corp.
英文描述: MATRIX SURROUND IC WITH I2C BUS
中文描述: 矩陣環(huán)繞集成電路I2C總線
文件頁(yè)數(shù): 17/76頁(yè)
文件大?。?/td> 544K
代理商: UPC1853CT-01
μ
PC1853
17
3. I
2
C BUS INTERFACE
The
μ
PC1853 has serial bus function. This serial bus (I
2
C bus) is a double wired bus developed by Philips. It is
composed of 2 wires: serial clock line (SCL) and serial data line (SDA).
The
μ
PC1853 has built-in I
2
C bus interface circuit, 9 rewritable registers (8 bits).
SCL (Serial Clock Line)
The master CPU outputs serial clock to synchronize with the data. According to this clock, the
μ
PC1853 takes
in the serial data.
Input level is compatible with CMOS.
Clock frequency is 0 to 100 kHz.
SDA (Serial Data Line)
The master CPU outputs the data which is synchronized with serial clock. The
μ
PC1853 takes in this data according
to the clock.
Input level is compatible with CMOS.
Fig. 3-1 Internal Equivalent Circuits of Interface Pin
SCL
SDA
R
P
R
P
PC1853
μ
3.1 Data Transfer
3.1.1 Start condition
Start condition is made by falling of SDA from “High” to “Low” during SCL is “High” as shown in
Fig. 3-2
.
When this start condition is received, the
μ
PC1853 takes in the data synchronizing with the clock after that.
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