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參數(shù)資料
| 型號： | UMA1018M |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Low-voltage dual frequency synthesizer for radio telephones |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1250 MHz, PDSO20 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 166K |
| 代理商： | UMA1018M |
1
6
P
P
L
s
U
Table 1
Format of programmed data
Table 2
Bit allocation (note 1)
Notes
1.
2.
FT = first; LT = last; sPON = software power-up for principal synthesizer (1 = ON); sAON = software power-up for auxiliary synthesizer (1 = ON).
The test register should not be programmed with any other value except all zeros for normal operation.
Table 3
Out-of-lock select
LAST IN
PROGRAMMING REGISTER BIT USAGE
FIRST IN
p21
ADD0
p20
ADD1
LATCH ADDRESS
p19
ADD2
p18
ADD3
p17
DATA0
LSB
p16
DATA1
../..
../..
p2
p1
DATA15
DATA16
MSB
DATA COEFFICIENT
FT
REGISTER BIT ALLOCATION
LT
p1
dt16
p2
dt15
p3
dt14
p4
dt13
p5
dt12
p6
p7
p8
p9
p10
p11
p12
p13
dt4
p14
dt3
p15
dt2
p16
dt1
p17
p18
p19
ADDRESS
0
0
1
1
1
1
0
p20
p21
DATA FIELD
TEST BITS
(2)
CR0
X
0
0
0
0
0
0
1
0
0
0
0
1
1
0
0
1
0
1
0
1
0
X
PM16
X
X
X
X
X
X
X
OLP
OLA
CR1
X
sPON
sAON
X
X
X
X
X
PM0
PR0
AM0
AR0
DA0
PRINCIPAL MAIN DIVIDER COEFFICIENT
PR10
PRINCIPAL REFERENCE DIVIDER COEFFICIENT
AUXILIARY MAIN DIVIDER COEFFICIENT
AR10
AUXILIARY REFERENCE DIVIDER COEFFICIENT
X
X
X
0
DA6
X
X
X
X
X
X
X
X
X
AM13
X
X
X
X
X
X
X
X
7-BIT DAC
OLP
OLA
OUT-OF-LOCK ON PIN 20
0
0
1
1
0
1
0
1
output disabled
auxiliary phase error
principal phase error
both auxiliary and principal
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