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參數(shù)資料
| 型號： | UMA1015AM |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Low-power dual frequency synthesizer for radio communications |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1100 MHz, PDSO20 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 159K |
| 代理商： | UMA1015AM |
1997 Sep 03
7
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer
for radio communications
UMA1015AM
Table 5
Charge pump current ratio
Table 6
Reference division ratio
Power-down modes
The device can be powered down either via pin HPD
(active LOW = power-down) or via the serial bus
(bits sPDA and sPDB, logic 0 = power-down).
CRA/CRB
CURRENT AT PUMP
I
CP
= 12
×
I
SET
I
CP
= 24
×
I
SET
0
1
SR
SYNTHESIZER A
SYNTHESIZER B
0
1
R
R
R
2R
The synthesizers are powered up when both hardware
and software Power-down signals are at logic 1. When
only one synthesizer is powered down, the functions
common to both will be maintained (independent of the
state of sPBF). When both synthesizers are powered
down, the f
xtal
buffer can be maintained in an active state
by setting sPBF to logic 1. This will allow any system clock
derived from the f
XTALO
buffered output to remain on in
power-down. Note that sPBF is independent of the state of
HPD. When both synthesizers are switched off, the
voltage doubler (if enabled) will remain active drawing a
reduced current. An internal oscillator will drive the doubler
in this situation. If both synthesizers have been in a
power-down condition, then when one or both
synthesizers are reactivated, the reference and main
dividers restart in such a way as to avoid large random
phase errors at the phase comparator.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.
SYMBOL
PARAMETER
MIN.
0.3
0.3
0.3
MAX.
UNIT
V
DD1
, V
DD2
DC range of digital power supply voltage with respect to DGND
V
CC
DC charge pump supply voltage with respect to AGND
V
CC-DD
difference in voltage between V
CC
and V
DD1
, V
DD2
V
n
DC voltage at pins 1, 2, 5, 6, 8 to 15, 19 and 20 with respect to DGND
0.3
V
3, 17
DC voltage at pins 3 and 17 with respect to AGND
V
GND
difference in voltage between AGND and DGND (these pins should be
connected together)
T
stg
storage temperature
T
amb
operating ambient temperature
+6.0
+6.0
+6.0
V
DD1
+ 0.3
V
CC
+ 0.3
+0.3
V
V
V
V
V
V
0.3
0.3
55
30
+125
+85
°
C
°
C
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| UMA1015M | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-power dual frequency synthesizer for radio communications |
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