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參數資料
| 型號： | UDA1351H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | 96 kHz IEC 958 audio DAC |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數： | 12/36頁 |
| 文件大小： | 157K |
| 代理商： | UDA1351H |
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2000 Feb 18
12
Philips Semiconductors
Preliminary specification
96 kHz IEC 958 audio DAC
UDA1351H
8.5.2
D
IGITAL DATA OUTPUT AND INPUT INTERFACE
The digital data interface enables the exchange of digital
data to and from an external signal processing device.
The digital output and input formats are identical by
design. The possible formats are (see Fig.5):
I
2
S-bus with a word length of up to 24 bits
LSB-justified with a word length of 16 bits
LSB-justified with a word length of 20 bits
LSB-justified with a word length of 24 bits.
Important: the edge of the WS signal must fall on the
negative edge of the BCK signal at all times for proper
operation of the input and output interface (see Fig.8).
In the static pin control mode the format is selected by
means of pins L3MODE and L3DATA. In the L3 control
mode the format defaults to the I
2
S-bus settings and is
programmable via the L3 interface.
The IEC 958 decoder provides the pre-emphasis
information from the IEC 958 input bitstream to pins
PREEM0 and PREEM1 and to the L3 interface register.
Controlling the de-emphasis is different for the 2 modes:
Static pin control mode:
– For IEC 958 input de-emphasis is automatically
done, but for I
2
S-bus input de-emphasis is not
possible.
L3 control mode:
– IEC 958 input: bit SPDSEL must be set to logic 1 and
de-emphasis is done automatically
– I
2
S-bus input: bit SPDSEL must be set to logic 0 and
de-emphasis can be controlled via bits DE0
and DE1.
8.5.3
A
UDIO FEATURE PROCESSOR
The audio feature processor automatically provides
de-emphasis for the IEC 958 data stream in the static pin
control mode and default mute at start-up in the L3 control
mode.
When used in the L3 control mode it provides the following
additional features:
Volume control using 6 bits
Bass boost control using 4 bits
Treble control using 2 bits
Mode selection of the sound processing bass boost and
treble filters: flat, minimum and maximum
Soft mute control with raised cosine roll-off
De-emphasis selection of the incoming data stream for
f
s
= 32.0, 44.1 and 48.0 kHz.
8.5.4
I
NTERPOLATOR
The UDA1351H includes an on-board interpolating filter
which converts the incoming data stream from 1f
s
to 128f
s
by cascading a recursive filter and a FIR filter.
Table 2
Interpolator characteristics
8.5.5
N
OISE SHAPER
The third-order noise shaper operates at 128f
s
. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a filter
stream digital-to-analog converter.
8.5.6
T
HE
F
ILTER
S
TREAM
DAC (FSDAC)
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage.
The filter coefficients are implemented as current sources
andaresummedat virtualground oftheoutputoperational
amplifier. In this way very high signal-to-noise
performance and low clock jitter sensitivity is achieved.
A post filter is not needed due to the inherent filter function
of the DAC. On-board amplifiers convert the FSDAC
output current to an output voltage signal capable of
driving a line output.
The output voltage of the FSDAC is scaled proportionally
with the power supply voltage.
PARAMETER
CONDITIONS
VALUE (dB)
±
0.03
50
115
3.5
Pass-band ripple
Stop band
Dynamic range
DC gain
0f
s
to 0.45f
s
>0.65f
s
0f
s
to 0.45f
s
相關PDF資料 |
PDF描述 |
|---|---|
| UDA1351TS | 96 kHz IEC 958 audio DAC |
| UDA1352HL | 48 kHz IEC 60958 audio DAC |
| UDA1360 | Low-voltage low-power stereo audio ADC |
| UDA1360TS | Low-voltage low-power stereo audio ADC |
| UDA1361 | 96 kHz sampling 24-bit stereo audio ADC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UDA1351H/N1,551 | 功能描述:數模轉換器- DAC 96 KHZ SPDIF DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| UDA1351H/N1,557 | 功能描述:數模轉換器- DAC 96 KHZ SPDIF DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| UDA1351TS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:96 kHz IEC 958 audio DAC |
| UDA1351TS/N1,512 | 功能描述:數模轉換器- DAC 96KHZ SPDIF DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| UDA1351TS/N1,518 | 功能描述:音頻數/模轉換器 IC 96KHZ SPDIF DAC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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