參數(shù)資料
型號: TVP5158PNPR
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP128
封裝: GREEN, PLASTIC, HTQFP-128
文件頁數(shù): 81/108頁
文件大小: 1395K
代理商: TVP5158PNPR
SLES243E
– JULY 2009 – REVISED MARCH 2011
Table 4-70. OFM Mode Control
Subaddress
B2h
Default
20h
7
6
5
4
3
2
1
0
Out_CLK_
Out_CLK_N_
Reserved
OSC_OUT_En
Out_CLK_P_En
Video_Port_En
Freq_Ctl
Pol_Sel
Freq_Sel
En
This register only needs to be written to video decoder core 0.
Out_CLK_Freq_Ctl
Output clock frequency control for 4-Ch Half-D1 + 1-Ch D1 and 8-Ch CIF + 1-Ch D1 line-interleaved, hybrid output formats only.
Affects both OCLK_P and OCLK_N.
0
108 MHz (default)
1
81 MHz
OSC_OUT_En
Oscillator output enable, active high
0
OSC_OUT disabled
1
OSC_OUT enabled (default)
Out_CLK_Pol_Sel
Output clock polarity select. Affects both OCLK_P and OCLK_N.
0
Non-inverted (default)
1
Inverted
Out_CLK_Freq_Sel
Output clock frequency select for 2-ch pixel-interleaved mode only. Affects both OCLK_P and OCLK_N.
0
54 MHz (default)
1
27 MHz
Out_CLK_P_En
Output data clock+ (OCLK_P) enable, active high
0
OCLK_P disabled (default)
1
OCLK_P enabled
Out_CLK_N_En
Output data clock- (OCLK_N) enable, active high
0
OCLK_N disabled (default)
1
OCLK_N enabled (for 2-Ch mode only)
Video_Port_En
Video port output enable, active high
0
All four video ports disabled (default)
1
All video ports required for selected output format enabled
74
Internal Control Registers
Copyright
2009–2011, Texas Instruments Incorporated
Product Folder Link(s): TVP5158 TVP5157 TVP5156
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