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參數(shù)資料
| 型號： | TVP5158PNPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封裝： | GREEN, PLASTIC, HTQFP-128 |
| 文件頁數(shù)： | 23/108頁 |
| 文件大?。?/td> | 1395K |
| 代理商： | TVP5158PNPR |
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SLES243E
– JULY 2009 – REVISED MARCH 2011
Figure 3-9. Peaking Filter Response, NTSC/PAL ITU-R BT.601 Sampling
3.3
AVID Cropping
AVID or active video cropping provides a means to decrease the amount of video data output. This is
accomplished by horizontally blanking a number of AVID pulses and by vertically blanking a number of
lines per frame. Horizontal cropping can be enabled/disabled using bit-6 of address B1h. When line
cropping is enabled, active video will be reduced from 720 to 704 pixels for unscaled video and from 360
to 352 pixels for down-scaled video.
When line cropping is enabled, the TVP5158 crops an equal amount from both the start and end of active
video. Register 8Ch can be used to delay both the start and end of active video. It allows selecting which
704 pixels out of 720 are actually being used for active video when line cropping is enabled.
3.4
Embedded Syncs
Standards with embedded syncs insert SAV and EAV codes into the data stream at the beginning and end
of horizontal blanking. These codes contain the V and F bits which also define vertical timing. F and V
change on EAV. Table 3-1 gives the format of the SAV and EAV codes.
H equals 1 always indicates EAV. H equals 0 always indicates SAV. The alignment of V and F to the line
and field counter varies depending on the standard. Please refer to ITU-R BT.656 for more information on
embedded syncs.
The P bits are protection bits:
P3 = V xor H
P2 = F xor H
P1 = F xor V
P0 = F xor V xor H
Table 3-1. EAV and SAV Sequence
8-BIT DATA
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Preamble
1
Preamble
0
Preamble
0
Status word
1
F
V
H
P3
P2
P1
P0
Copyright
2009–2011, Texas Instruments Incorporated
Functional Description
21
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| TVP5160PNPG4 | 制造商:Texas Instruments 功能描述: |
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