參數(shù)資料
型號(hào)： TVP5158PNP
廠商： TEXAS INSTRUMENTS INC
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： COLOR SIGNAL DECODER, PQFP128
封裝： GREEN, PLASTIC, HTQFP-128
文件頁(yè)數(shù)： 28/108頁(yè)
文件大?。?/td> 1395K
代理商： TVP5158PNP
SLES243E
– JULY 2009 – REVISED MARCH 2011
3.8.3
Line-Interleaved Mode Support (TVP5158 only)
The TVP5158 supports 2-Ch, 4-Ch, and 8-Ch line-interleaved modes. In the line-interleaved mode, the
video channels are multiplexed together on a line-by-line basis. Compared to the pixel-interleaved mode,
the line-interleaved mode significantly reduces the code complexity and MIPS consumption of the backend
processor. The 8-Ch modes require connecting two TVP5158 devices together using a video cascade
interface (see Section 3.8.3.3). The TVP5158 also supports different image resolutions (for example, D1,
Half-D1, and CIF) in the line-interleaved mode. All supported line-interleaved modes are shown in
Table 3-10. Output Ports Configuration for Line-Interleaved Mode
Video Output
Cascade
I2C Address:
OCLK
Port A
Port B
Port C
Port D
Format
Stage
B0h
(MHz)
2-Ch D1
n/a
90h
54
Any 2 of 4 Ch
Hi-Z
4-Ch D1
n/a
A0h
108
All 4 Ch
Hi-Z
4-Ch Half-D1
n/a
A2h
54
All 4 Ch
Hi-Z
4-Ch CIF
n/a
A3h
27
All 4 Ch
Hi-Z
4-Ch D1
All 4 Ch
n/a
A8h
54
Hi-Z
(16-bit)
(Y data)
(C data)
4-Ch Half-D1
All 4 Ch
n/a
AAh
27
Hi-Z
(16-bit)
(Y data)
(C data)
8-Ch Half-D1
4-Ch Half-D1
1st
B2h
108
Hi-Z
Output
Input
8-Ch Half-D1
4-Ch Half-D1
2nd
B6h
54
Hi-Z
Output
8-Ch CIF
1st
B3h
54
Hi-Z
4-Ch CIF Input
Output
8-Ch CIF
4-Ch CIF
2nd
B7h
27
Hi-Z
Output
4-Ch Half-D1 +
4 Ch Half-D1 +
n/a
E2h
108
Hi-Z
1-Ch D1
Any 1 of 4 D1
4-Ch CIF +
4-Ch CIF + Any
n/a
E3h
54
Hi-Z
1-Ch D1
1 of 4 D1
8-Ch CIF + Any
1st
F3h
108
Hi-Z
1-Ch D1 Input
4-Ch CIF Input
1 of 8 D1
8-Ch CIF +
1-Ch D1
4-Ch CIF
2nd
F7h
27
1-Ch D1 Output
Hi-Z
Output
3.8.3.1
2-Ch Line-Interleaved Mode
TVP5158 supports 2-Ch line-interleaved mode at 54 MHz. The video output data with D1 resolution from
any two video channels is multiplexed together on a line basis. The output ports DVO_A and DVO_B are
used in this mode. The output clock OCLK_P is synchronized with both output ports.
3.8.3.2
4-Ch Line-Interleaved Mode
In 4-Ch line-interleaved mode, the video output data from all 4 channels is multiplexed together on a line
basis. The output resolution of video data can be D1, Half-D1 or CIF. For D1 and Half-D1 output
resolutions, the video output port can be configured to support 8-bit BT.656 or 16-Bit YCbCr 4:2:2 data
with embedded sync. Port DVO_A is used for 8-bit output. Ports DVO_A and DVO_B are used for 16-Bit
output. The output clock OCLK_P is synchronized with all four output ports.
TVP5158 supports multiplexing 4-Ch CIF and 1-Ch D1 data together and then output through DVO_A at
54 MHz. 1-Ch D1 can be from any one of 4 video channels. In typical surveillance applications, CIF
resolution is used for recording and D1 resolution is used for video preview.
26
Functional Description
Copyright
2009–2011, Texas Instruments Incorporated
Product Folder Link(s): TVP5158 TVP5157 TVP5156
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