![](http://datasheet.mmic.net.cn/130000/TVP5040PFP_datasheet_5023357/TVP5040PFP_89.png)
2–73
2.13.66 VIP Program RAM Read
VIP address
1600h
PHI address
N/A
I2C address
N/A
7
6
5
4
3
2
1
0
Program RAM Read Data
If the PHI or I2C host interface is enabled, the program RAM can be read via the nonVIP program RAM read register
at address 8E. If the VIP host interface is enabled, the program RAM can be read via VIP FIFO B at location 6 in the
VIP FIFO address space.
2.13.67 Parallel Host Interface Teletext FIFO
VIP address
N/A
PHI address
10
I2C address
N/A
7
6
5
4
3
2
1
0
Teletext FIFO
This read-only register is only accessible when the PHI interface is enabled. To access this register, use the direct
address of 10. Notice almost all the PHI registers are accessed through an indirect address scheme, by writing the
indirect address to address 00 and then write to or read from address 01. This register contains the same information
as the teletext FIFO register at indirect address B0 and is the recommended way of reading data from the teletext
FIFO due to its efficiency.
2.13.68 Parallel Host Interface Status/Interrupt A
VIP address
N/A
PHI address
11
I2C address
N/A
7
6
5
4
3
2
1
0
TvpLOCK state
TvpLOCK interrupt
Cycle complete
Bus error
CC odd field
CC even field
Teletext threshold
Teletext data
The read-write register is only accessible when the VMI interface is enabled. To access this register, use the direct
address of 11. Notice almost all the VMI registers are accessed through an indirect address scheme, by writing the
indirect address to address 00 and then writing to or reading from address 01. This register contains the same
information as the interrupt status register A at indirect address C0 and is the recommended way of reading the
interrupt/status information due to its efficiency. After an interrupt condition is set, it can be reset by writing to this
register with a 1 in the appropriate bit(s).
Teletext Data
*0 = Teletext data buffer empty or we have not reached the video line number that equals
the interrupt line number register
1 = Teletext data buffer contains a complete transaction and the video line number =
interrupt line number
Note this bit can be configured to occur whenever the video line number = interrupt line
number register regardless of the data.
Teletext Threshold
*0 = Threshold not reached
1 = Teletext data in buffer has reached configurable threshold
CC Even Field
*0 = Buffer empty
1 = Even field closed caption buffer contains data
CC Odd Field
*0 = Buffer empty
1 = Odd field closed caption buffer contains data