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參數資料
| 型號： | TVP5020 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP80 |
| 封裝： | POWER, PLASTIC, TQFP-80 |
| 文件頁數： | 37/89頁 |
| 文件大小： | 376K |
| 代理商： | TVP5020 |
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2–28
VMI modes A and B are from the Video Electronics Standards Association (VESA) video module interface
(VMI) proposal version 1.4. Mode C is designed to conform to the interface requirements of the IBM
PowerPC 403GC. Table 2–8 summarizes the terminal functions of the VMI mode host interface.
Table 2–8. VMI Host Port Terminal Definitions
SIGNAL
VMI SIGNAL
NAME
TYPE
DESCRIPTION
VC3
CS
I
Active low chip select - mode B
VC0
DTACK – mode A
READY – mode B
O (see below)
Data acknowledge – mode A
Data ready – modes B and C
VC1
R/W – mode A
WR – mode B
I
Read/write – modes A and C
Write strobe – mode B
VC2
DS – mode A
RD – mode B
I
Data strobe – mode A and C
Read strobe – mode B
A1:A0
HA[1:0]
I
Address bus from host
D7:D0
HD[7:0]
I/O
Input/output data bus from host
INTREQ
O (nominal open drain)
Interrupt request
INTREQ is a nominally open drain terminal that signals interrupts to the host controller. The interrupt
configuration register at subaddress C2 can configure this terminal as a conventional CMOS I/O buffer
(non-open drain). Conflict is possible if INTREQ is connected to multiple devices and INTREQ is not
configured in the open drain mode.
VC0 (DTACK/READY) is in the high impedance state when VC3 is not asserted.
2.9
Host Port – Mode A Timing
Host port mode A has a bus interface that accommodates the Motorola type of control signals. The diagram
below shows the timing of the mode A signals. The host initiates the cycle when VC2 transitions low. The
target responds by pulling VC0 low to indicate it is receiving the data or that the requested data is present
on the bus. The host completes its cycle by pulling VC2 high. Once the host completes its cycle, the target
pulls VC0 high. The host may change VC1, A[1:0], and Din[7:0] as soon as it receives VC0.
205 ns Max
85 ns Min
20 ns Min
Read Data
Write Data
VC2 (DS)
VC1 (R/W)
A (0–1)
D IN (0–7)
D OUT (0–7)
VC0 (DTACK)
Figure 2–26. VMI Host Port Mode A Timing
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TVP5020CPFP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP5020PFC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| TVP5020TQFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL VIDEO DECODER |
| TVP5021PFP | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5021PFPG4 | 功能描述:視頻 IC NTSC/PAL DIGITAL VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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