參數(shù)資料
型號： TVP5020
廠商： TEXAS INSTRUMENTS INC
元件分類： 顏色信號轉(zhuǎn)換
英文描述： COLOR SIGNAL DECODER, PQFP80
封裝： POWER, PLASTIC, TQFP-80
文件頁數(shù)： 20/89頁
文件大?。?/td> 376K
代理商： TVP5020
2–13
2.5
I2C/VIP/VMI Host Interface
Communication with the TVP5020 is via an interface that is configurable at power up to support an I2C, VIP,
or VMI bus host. The host interface accesses status and control registers and retrieves sliced VBI data. The
host interface also initializes the TVP5020’s internal microprocessor.
I2C
Interface
Module
VIP
Interface
Module
VMI
Interface
Module
I/O
MUX
I/O
DMA
BIU
Interface
Module
GLCO, PALI, FID
TVP, CPU
Interface
VDP
Modules
VC0
VC1
VC3
VC0
VC1
VC2
VC3
INTREQ
A0–A1
D0–D7
VC0
VC1
VC2
VC3
INTREQ
Figure 2–19. Host Interface
The host port mode is selected by attaching external pullup and pulldown resistors to the GLCO, PALI, and
FID terminals. The TVP5020 samples the state of the terminals at trailing edge of RSTINB and configures
the host port accordingly. Table 2–2 shows the pullup/pulldown combinations required to select each of the
host port modes. Figure 2–19 is a block diagram of the host interface showing the mode selection and host
interface terminals, as well as interfaces to the internal microprocessor and VBI data processor.
Table 2–2. Host Port Select
TERMINALS
GLCO
PALI
FID
TERMINALS
2
1
0
I2C Host Port
0
1
VIP Host Port
0
1
0
VMI Host Port Mode A
1
0
1
VMI Host Port Mode B
1
0
VMI Host Port Mode C
1
2.6
I2C Interface
The TVP5020 host port interface is configured for I2C operation by attaching external pull-up and pull-down
resisters to the GLCO, PALI, and FID terminals. The following is the combination of resisters required to
select the I2C host mode. (1 is pullup and 0 is pulldown)
TERMINALS
GLCO
PALI
FID
TERMINALS
2
1
0
I2C Host Port Enabled
0
1
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