參數(shù)資料
型號: TSC2008IRGVT
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC16
封裝: 4 X 4 MM, GREEN, PLASTIC, VQFN-16
文件頁數(shù): 18/40頁
文件大?。?/td> 1028K
代理商: TSC2008IRGVT
8-BIT OPERATION TIMING
1
SCLK
CS
8
1
SDO
PENIRQ
S
SDI
ControlBits
S
ControlBits
HIGH: Disableor(EnableandNotTouched)
New
Definition
PENIRQ
LOW: EnableandTouched
7
6
5
7
6
5
4
3
2
1
0
8
1
8
A2 A1 A0 MODE
SER/
DFR
PD1 PD0
A2 A1 A0 MODE
SER/
DFR
PD1 PD0
n
n +1
n
n +1
HIGH: Disableor
(EnableandNotTouched)
LOW: EnableandTouched
Idle
Acquire Conv
Idle
Acquire Conv
Idle
New
Def
PENIRQ
1
SCLK
CS
8
1
SDO
PENIRQ
S
SDI
ControlBits
S
1
ControlBits
HIGH: Disableor(EnableandNotTouched)
LOW: EnableandTouched
7
6
5
7
6
5
4
3
2
1
0
8
1
A2 A1 A0 MODE
SER/
DFR
PD1 PD0
A2 A1 A0 MODE
SER/
DFR
PD1 PD0
n
n +1
n
n +1
HIGH: Disableor
(EnableandNotTouched)
LOW: EnableandTouched
Idle
Acquire Conv
Idle
Acquire
Conv
Idle
www.ti.com.......................................................................................................................................................... SBAS406B – JUNE 2008 – REVISED MARCH 2009
If the 8-bit ADC mode produces an acceptable result, then 16 SCLKs per cycle operation can also be used, as
shown in Figure 32. If SDO is released one-half SCLK cycle earlier (with the SDO adjusted option), the fastest
transfer (eight SCLKs per cycle) is achievable; see Figure 33.
Figure 32. Conversion Timing—8-Bit Mode, 16 SCLKs per Cycle, 8-Bit Bus Interface, without Adjusted
Figure 33. Conversion Timing—8-Bit Mode, 8 SCLKs per Cycle, 8-Bit Bus Interface, with Adjusted SDO
Timing
Copyright 2008–2009, Texas Instruments Incorporated
25
Product Folder Link(s): TSC2008
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