參數(shù)資料
型號(hào): TPS62410DRCTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 1.6 A DUAL SWITCHING CONTROLLER, 2500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, GREEN, PLASTIC, MLF-10
文件頁數(shù): 6/31頁
文件大?。?/td> 1240K
代理商: TPS62410DRCTG4
www.ti.com
Converter 1
Converter 2
POWER SAVE MODE
I
OUT_PFM_enter +
VIN
DCDC
32 W
(1)
I
OUT_PFM_leave +
VIN
DCDC
24 W
(2)
SLVS737 – FEBRUARY 2007
DETAILED DESCRIPTION (continued)
Frequency Modulation). During PWM operation the converters use a unique fast response voltage mode
controller scheme with input voltage feed-forward to achieve good line and load regulation allowing the use of
small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the
P-channel MOSFET switch is turned on and the inductor current ramps up until the comparator trips and the
control logic turns off the switch.
Each converter integrates two current limits, one in the P-channel MOSFET and another one in the N-channel
MOSFET. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is
turned off and the N-channel MOSFET is turned on. If the current in the N-channel MOSFET is above the
N-MOS current limit threshold, the N-channel MOSFET remains on until the current drops below its current limit.
The two DC-DC converters operate synchronized to each other. A 180
° phase shift between converter 1 and
converter 2 decreases the input RMS current.
In the adjustable output voltage version TPS62410 the converter 1 output voltage can be set via an external
resistor network on PIN DEF_1, which operates as an analog input. In this case, the output voltage can be set in
the range of 0.6V to VIN V. The FB1 Pin must be directly connected to the converter 1 output voltage VOUT1. It
feeds back the output voltage directly to the regulation loop.
The output voltage of converter 1 can also be changed by the EasyScale serial Interface. This makes the device
very flexible for output voltage adjustment. In this case, the device uses an internal resistor network.
In the adjustable output voltage version TPS62410, the converter 2 output voltage is set by an external resistor
divider connected to ADJ2 Pin and uses an external feed forward capacitor of 33pF.
It is also possible to change the output voltage of converter 2 via the EasyScale Interface. In this case, the ADJ2
Pin must be directly connected to converter 2 output voltage VOUT2. At TPS62410 no external resistor network
may be connected.
The Power Save Mode is enabled with Mode/Data Pin set to 0 for both converters. If the load current of a
converter decreases, this converter will enter Power Save Mode operation automatically. The transition to Power
Save Mode of a converter is independent from the operating condition of the other converter. During Power
Save Mode the converter operates with reduced switching frequency in PFM mode and with a minimum
quiescent current to maintain high efficiency. The converter will position the output voltage in PFM mode to
typically 1.01xVOUT. This voltage positioning feature minimizes voltage drops caused by a sudden load step.
In order to optimize the converter efficiency at light load the average inductor current is monitored. The device
changes from PWM Mode to Power Save Mode, if in PWM mode the inductor current falls below a certain
threshold. The typical output current threshold depends on VIN and can be calculated according to Equation 1
for each converter.
Equation 1: Average output current threshold to enter PFM Mode
Equation 2: Average output current threshold to leave PFM Mode
In order to keep the output voltage ripple in Power Save Mode low, the output voltage is monitored with a single
threshold comparator (skip comparator). As the output voltage falls below the skip comparator threshold (skip
comp) of 1.01 x VOUTnominal, the corresponding converter starts switching for a minimum time period of
typically 1
s and provides current to the load and the output capacitor. Therefore the output voltage increases
and the device maintains switching until the output voltage trips the skip comparator threshold (skip comp)
again. At this moment all switching activity is stopped and the quiescent current is reduced to minimum. The
load is supplied by the output capacitor until the output voltage has dropped below the threshold again.
14
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