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參數(shù)資料
| 型號： | TMX320F28044ZGMQ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processor |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 87/107頁 |
| 文件大小： | 784K |
| 代理商： | TMX320F28044ZGMQ |
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t
d(IDLEXCOL)
X1/X2
or XCLKIN
XCLKOUT
HALT
HALT
Wake-up Latency
Flushing Pipeline
t
d(WAKEHALT)
(A)
(B)
(C)
(D)
Device
Status
(E)
(G)
(F)
PLL Lock-up Time
Normal
Execution
t
w(WAKE-GPIO)
t
p
GPIOn
Oscillator Start-up Time
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
Table 6-17. HALT Mode Switching Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
cycles
cycles
t
d(IDLE-XCOL)
t
p
Delay time, IDLE instruction executed to XCLKOUT low
PLL lock-up time
Delay time, PLL lock to program execution resume
Wake up from flash
–
Flash module in sleep state
32t
c(SCO)
45t
c(SCO)
131072t
c(OSCCLK)
1125t
c(SCO)
cycles
t
d(WAKE-HALT)
35t
c(SCO)
cycles
Wake up from SARAM
A.
B.
IDLE instruction is executed to put the device into HALT mode.
The PLL block responds to the HALT signal. SYSCLKOUT is held for approximately 32 cycles before the oscillator is
turned off and the CLKIN to the core is stopped. This 32-cycle delay enables the CPU pipe and any other pending
operations to flush properly.
Clocks to the peripherals are turned off and the PLL is shut down. If a quartz crystal or ceramic resonator is used as
the clock source, the internal oscillator is shut down as well. The device is now in HALT mode and consumes
absolute minimum power.
When the GPIOn pin is driven low, the oscillator is turned on and the oscillator wake-up sequence is initiated. The
GPIO pin should be driven high only after the oscillator has stabilized. This enables the provision of a clean clock
signal during the PLL lock sequence. Since the falling edge of the GPIO pin asynchronously begins the wakeup
procedure, care should be taken to maintain a low noise environment prior to entering and during HALT mode.
When GPIOn is deactivated, it initiates the PLL lock sequence, which takes 131,072 OSCCLK (X1/X2 or X1 or
XCLKIN) cycles.
When CLKIN to the core is enabled, the device will respond to the interrupt (if enabled), after a latency. The HALT
mode is now exited.
Normal operation resumes.
C.
D.
E.
F.
G.
Figure 6-12. HALT Wake-Up Using GPIOn
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Electrical Specifications
87
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TMX320F28044ZGMS | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processor |
| TMX320F28045GGMA | 制造商:Texas Instruments 功能描述:TMS320F28044, TMS320F28045 DIGITAL CONTROLLERS - Trays |
| TMX320F28045PZA | 制造商:Texas Instruments 功能描述:TMS320F28044, TMS320F28045 DIGITAL CONTROLLERS - Trays |
| TMX320F28045ZGMA | 制造商:Texas Instruments 功能描述:TMS320F28044, TMS320F28045 DIGITAL CONTROLLERS - Trays |
| TMX320F28055PNT | 功能描述:32位微控制器 - MCU GIZMO MASS MARKET RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
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