參數(shù)資料
型號： TMX320C6415TGLZ
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 定點數(shù)字信號處理器
文件頁數(shù)： 95/140頁
文件大?。?/td> 2033K
代理商： TMX320C6415TGLZ
SPRS226H NOVEMBER 2003 REVISED AUGUST 2005
95
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
SYNCHRONOUS DRAM TIMING (CONTINUED)
timing requirements for synchronous DRAM cycles for EMIFB module
(see Figure 27)
NO.
600
720
850
1G
UNIT
MIN
2.1
MAX
6
tsu(EDV-EKO1H)
th(EKO1H-EDV)
Setup time, read EDx valid before ECLKOUTx high
ns
7
Hold time, read EDx valid after ECLKOUTx high
2.5
ns
These C64x
devices have two EMIFs (EMIFA and EMIFB). All EMIFA signals are prefixed by an “A” and all EMIFB signals are prefixed by a
“B”. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted [e.g., the synchronous DRAM
memory access signals are shown as generic ( SDCAS, SDWE, and SDRAS ) instead of ASDCAS, ASDWE, and ASDRAS (for EMIFA) and
BSDCAS, BSDWE, and BSDRAS (for EMIFB)].
switching characteristics over recommended operating conditions for synchronous DRAM cycles
for EMIFB module
(see Figure 27Figure 34)
NO.
PARAMETER
600
720
850
1G
UNIT
MIN
MAX
1
td(EKO1H-CEV)
td(EKO1H-BEV)
td(EKO1H-BEIV)
td(EKO1H-EAV)
td(EKO1H-EAIV)
td(EKO1H-CASV)
td(EKO1H-EDV)
td(EKO1H-EDIV)
td(EKO1H-WEV)
td(EKO1H-RAS)
td(EKO1H-ACKEV)
td(EKO1H-PDTV)
These C64x
devices have two EMIFs (EMIFA and EMIFB). All EMIFA signals are prefixed by an “A” and all EMIFB signals are prefixed by a
“B”. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted [e.g., the synchronous DRAM
memory access signals are shown as generic ( SDCAS, SDWE, and SDRAS ) instead of ASDCAS, ASDWE, and ASDRAS (for EMIFA) and
BSDCAS, BSDWE, and BSDRAS (for EMIFB)].
Delay time, ECLKOUTx high to CEx valid
1.3
6.4
ns
2
Delay time, ECLKOUTx high to BEx valid
6.4
ns
3
Delay time, ECLKOUTx high to BEx invalid
1.3
ns
4
Delay time, ECLKOUTx high to EAx valid
6.4
ns
5
Delay time, ECLKOUTx high to EAx invalid
1.3
ns
8
Delay time, ECLKOUTx high to SDCAS valid
1.3
6.4
ns
9
Delay time, ECLKOUTx high to EDx valid
6.4
ns
10
Delay time, ECLKOUTx high to EDx invalid
1.3
ns
11
Delay time, ECLKOUTx high to SDWE valid
1.3
6.4
ns
12
Delay time, ECLKOUTx high to SDRAS valid
1.3
6.4
ns
13
Delay time, ECLKOUTx high to ASDCKE valid (EMIFA only)
1.3
6.4
ns
14
Delay time, ECLKOUTx high to PDT valid
1.3
6.4
ns
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