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參數(shù)資料
| 型號(hào)： | TMUX03155 |
| 廠商： | Lineage Power |
| 英文描述： | STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer(STS-3/STM-1 (AU-4)多路復(fù)用器/多路分解器) |
| 中文描述： | STS-3/STM-1（非盟- 4）多路復(fù)用器/多路解復(fù)用器（STS-3/STM-1（非盟- 4）多路復(fù)用器/多路分解器） |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 261K |
| 代理商： | TMUX03155 |
Product Brief
February 1998
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
3
Lucent Technologies Inc.
Mode Control Signals
The device is controlled by four control signals:
control:
T/RSONET_SDH
and
T/RSTS3_AU4
signals. These signals
I
The type of input signal to expect (low-speed (LS) side—STS-1/AU-3),
I
The expected high-speed (HS) input/output signal format—STS-3/STM-1 (AU-4), and
I
The default byte value in the outgoing HS frame.
These provisioning signals are summarized in Table 1 and Table 2.
Transmit Direction Overview
The following major functions are performed in the transmit direction: STS-1/AU-3 Bus Mode Input Retiming, Input
Select Control, STS-1/AU-3 Inputs, Out-of-Frame (OOF) and Loss-of-Frame (LOF) Monitoring, Descramble
Enable/Disable, Monitor B1 and B2 Errors, H4 Multiframe and Pointer Monitor (AU-4 Mode Only), STS-3 Generate,
STM-1 (AU-4) Frame Generation (AU-4 Mode), Transport Overhead Access Channel (TOAC) Insert, STS-3/STM-1
(AU-4) Scramble Enable, STS-3/STM-1 (AU-4) Loopback Control, and STS-3/STM-1 (AU-4) Output Interface.
STS-1/AU-3 Bus Mode Input Retiming
The bus mode provides a single byte-wide bus and parity bit that is shared with up to three devices at
19.44 Mbits/s. The device will source a clock (19.44 MHz), synchronous payload envelope (SPE) indicator, J0J1V1
indicator, and V1 time indicator signals toward the downstream devices. These signals guarantee frame alignment
between all three STS-1/AU-3 inputs and H4 byte multiframe values (AU-4 mode).
Input Select Control
This function determines which signals are multiplexed to form the STS-3/STM-1 (AU-4) signal. Loopback (STS-1/
AU-3-R to STS-1/AU-3-T), input shuffle, and multicast operations are possible. The
are labeled S#1T, S#2T, and S#3T in Figure 1. When any one of the inputs is in loopback mode, all other inputs are
timed off the receive high-speed clock.
selected STS-1/AU-3 inputs
Table 1. Transmit Mode Control Signals
TSTS3_AU4
0 = STS-3
1 = AU-4
0 = STS-3
1 = AU-4
TSONET_SDH
0 = SONET
0 = SONET
1 = SDH
1 = SDH
Description
Three STS-1 inputs multiplexed to an STS-3 output.
Three AU-3 signals multiplexed to an STM-1 (AU-4) signal.
Three STS-1 inputs multiplexed to an STS-3 output.
Three AU-3 signals multiplexed to an STM-1 (AU-4) signal.
Table 2. Receive Mode Control
RSTS3_AU4
0 = STS-3
1 = AU-4
0 = STS-3
1 = AU-4
RSONET_SDH
0 = SONET
0 = SONET
1 = SDH
1 = SDH
Description
One STS-3 input demultiplexed to three STS-1 outputs.
One STM-1 (AU-4) input demultiplexed to three AU-3 outputs.
One STS-3 input demultiplexed to three STS-1 outputs.
One STM-1 (AU-4) input demultiplexed to three AU-3 outputs.
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