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參數(shù)資料
| 型號： | TMUX03155 |
| 廠商： | Lineage Power |
| 英文描述： | STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer(STS-3/STM-1 (AU-4)多路復用器/多路分解器) |
| 中文描述： | STS-3/STM-1（非盟- 4）多路復用器/多路解復用器（STS-3/STM-1（非盟- 4）多路復用器/多路分解器） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 261K |
| 代理商： | TMUX03155 |
Product Brief
February 1998
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
2
Lucent Technologies Inc.
Block Diagram
In the transmit direction, the device outputs a clock and sync and accepts bused data[7:0] and a parity signal from
up to three devices. The device outputs one data bundle at the STS-3/STM-1 (AU-4) rate (clock, sync, data[7:0],
and parity bit). A local clock and optional frame sync signal are needed for operation of the device. A transport
overhead access channel (TOAC) is provided to allow overwriting of the transport overhead bytes in the output
STS-3/STM-1 (AU-4) frame.
In the receive direction, the device accepts one STS-3/STM-1 (AU-4) bundle (clock, data, parity), and accepts a
loss-of-signal indication from an external source. The device outputs three STS-1/AU-3 signals over a bus interface
(clock, data, J0 time, parity). The STS-3/STM-1 (AU-4) input clock is used to clock this direction. A transport over-
head access channel is provided for additional external monitoring of the incoming transport overhead of the STS-
3/STM-1 (AU-4) frame. A pointer interpreter is provided to monitor path functions.
The device has loopback capabilities at the STS-1/AU-3 and STS-3/STM-1 (AU-4) interfaces. An 8-bit microproces-
sor interface, JTAG control logic, and in-circuit test capabilities are provided.
5-5294(F).ar.4
Figure 1. TMUX03155 Block Diagram
TOAC
DROP
3:1
MUX
LOGIC
SPE
GENERATE
1:3
DEMUX
LOGIC
LOOPBACK
SELECT
LOGIC
TRANSPORT
AND PATH
MONITORS
OVERHEAD
LOSS OF
CLOCK
BER
MONITOR
#1R
#2R
#3R
#1T, #2T, #3T
#1R, #2R, #3R
SELECT/
MULTI-
CAST
LOGIC
OVERHEAD
MONITOR
TOAC
INSERT
MICROPROCESSOR
INTERFACE
LOCAL CLOCK
GENERATION
TRANSMIT DIRECTION
RECEIVE DIRECTION
S#1T
S#2T
S#3T
TLSCLKO
(19.44 MHz)
#1T
#2T
#3T
OVERHEAD
MONITOR
OVERHEAD
MONITOR
B
C
DROP
SELECT/
MULTI-
CAST
LOGIC
LOOPBACK
SELECT
LOGIC
ADD
TLSSPEO,
TLSPARI
TLSDATA[7:0]I
RLSCLKO
(19.44 MHz)
B
C
RLSJ0TIMEO
RLSPARO
RLSDATA[7:0]O
TTOACCLKO (5.184 MH
Z
),
TTOACSYNCO (8 kH
Z
),
TTOACDATAI (5.184 Mbits/s)
POINTER
INTERPRETER
LOS
FRAMER
RHSLOSEXTI
TLSV1TIMEO
RTOACCLKO (5.184 MH
Z
),
RTOACSYNCO (8 kH
Z
),
RTOACDATAO (5.184 Mbits/s)
THSSCLKOT/C (155.52 MH
Z
),
THSSSYNCOT/C (8 kH
Z
),
THSSDATAOT/C (155.52 Mbits/s)
OR
RHSSCLKIT/C (155.52 MH
Z
)
RHSSDATAIT/C (155.52 Mbits/s)
OR
RHSCLKI (38.88 OR 19.44 MHz),
RHSDATA[7:0]I (38.88 OR 19.44 Mbits/s),
RHSPARI (38.88 OR 19.44 Mbits/s)
TLSC1J1V1TIMEO,
THSCLKO (38.88 OR 19.44 MHz),
THSSYNCO (8 kH
Z
),
THSDATA[7:0]O (38.88 OR 19.44 Mbits/s),
THSPARO (38.88 OR 19.44 Mbits/s)
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