參數(shù)資料
型號(hào)： TMS6641648A
廠商： Texas Instruments, Inc.
英文描述： 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
中文描述： 4 194 304 4位/ 2 097 152 8位/ 1 048 576由16位4，銀行同步動(dòng)態(tài)隨機(jī)存取記憶體
文件頁(yè)數(shù)： 7/56頁(yè)
文件大小： 958K
代理商： TMS6641648A
TMS664414, TMS664814, TMS664164
4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS695A – APRIL 1998 – REVISED JULY 1998
7
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
operation (continued)
Table 2. Clock-Enable (CKE) Command Truth Table
COMMAND
STATE OF BANK(S)
CKE
(n–1)
CKE
(n)
CS
(n)
RAS
(n)
CAS
(n)
W
(n)
MNEMONIC
Self-refresh entry
All banks = deac
H
L
L
L
L
H
SLFR
Power-down entry at n + 1
All banks = no
access operation§
H
L
X
X
X
X
PDE
Self refresh exit
Self-refresh exit
All banks =
self-refresh
L
H
L
H
H
H
—
L
H
H
X
X
X
—
Power-down exit
All banks =
power down
L
H
X
X
X
X
—
CLK suspend at n+1
All banks = access
operation§
H
L
X
X
X
X
HOLD
CLK suspend exit at n+1
All banks = access
operation§
L
H
X
X
X
X
—
For execution of these commands, A0–A13 (n) and DQMx (n) are don’t care entries.
On cycle n, the device executes the respective command (listed in Table 1). On cycle (n+1), the device enters the power-down mode.
§A bank is no longer in an access operation one cycle after the last data-out cycle of a READ (READ-P) operation, and two cycles after the last
data-in cycle of a WRT (WRT-P) operation. Neither the PDE nor the HOLD command is allowed on the cycle immediately following the last data-in
cycle of a WRT (WRT-P) operation.
If setup time from CKE high to the next CLK high satisfies tCESP, the device executes the respective command (listed in Table 1). Otherwise,
either the DESL or NOOP command must be applied before any other command.
Legend:
n
=
CLK cycle number
L
=
Logic low
H
=
Logic high
X
=
Don’t care (either logic high or logic low)
deac =
Deactivated
相關(guān)PDF資料
PDF描述
TMS66441410 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
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TMS664414 制造商:TI 制造商全稱:Texas Instruments 功能描述:4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
TMS66441410 制造商:TI 制造商全稱:Texas Instruments 功能描述:4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
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