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6.10 Enhanced Control Peripherals
6.10.1 Enhanced Pulse Width Modulator (ePWM) Timing
6.10.2 Trip-Zone Input Timing
PWM
(B)
TZ
XCLKOUT
(A)
t
w(TZ)
t
d(TZ-PWM)HZ
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
Table 6-18
shows the PWM output timing requirements and
Table 6-19
, switching characteristics.
Table 6-18. ePWM Timing Requirements
(1)
TEST CONDITIONS
Asynchronous
Synchronous
With input qualifier
MIN
MAX
UNIT
cycles
cycles
cycles
t
w(SYCIN)
Sync input pulse width
2t
c(SCO)
2t
c(SCO)
1t
c(SCO)
+ t
w(IQSW)
(1)
For an explanation of the input qualifier parameters, see
Table 6-11
.
Table 6-19. ePWM Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
20
MAX
UNIT
ns
cycles
ns
t
w(PWM)
t
w(SYNCOUT)
t
d(PWM)tza
Pulse duration, PWMx output high/low
Sync output pulse width
Delay time, trip input active to PWM forced high
Delay time, trip input active to PWM forced low
Delay time, trip input active to PWM Hi-Z
8t
c(SCO)
no pin load
25
t
d(TZ-PWM)HZ
20
ns
A.
B.
TZ - TZ1, TZ2, TZ3, TZ4, TZ5, TZ6
PWM refers to all the PWM pins in the device. The state of the PWM pins after TZ is taken high depends on the PWM
recovery software.
Figure 6-13. PWM Hi-Z Characteristics
Table 6-20. Trip-Zone input Timing Requirements
(1)
MIN
MAX
UNIT
cycles
cycles
cycles
t
w(TZ)
Pulse duration, TZx input low
Asynchronous
Synchronous
With input qualifier
1t
c(SCO)
2t
c(SCO)
1t
c(SCO)
+ t
w(IQSW)
(1)
For an explanation of the input qualifier parameters, see
Table 6-11
.
Table 6-21
shows the high-resolution PWM switching characteristics.
Electrical Specifications
88
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