參數(shù)資料
型號(hào): TMS320F28044ZGMQ
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: Digital Signal Processor
中文描述: 數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 11/107頁(yè)
文件大?。?/td> 784K
代理商: TMS320F28044ZGMQ
www.ti.com
2
Introduction
2.1
Pin Assignments
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
The TMS320F28044 device, member of the TMS320C28x DSP generation, is a highly integrated,
high-performance solution for demanding control applications.
Throughout this document, TMS320F28044 is abbreviated as F28044.
Table 2-1
provides a summary of
the device's features.
Table 2-1. Hardware Features
FEATURE
F28044
10 ns
10K
Instruction cycle (at 100 MHz)
Single-access RAM (SARAM) (16-bit word)
(L0, L1, M0, M1)
64K
Yes
Yes
3.3-V on-chip flash (16-bit word)
On-chip ROM (16-bit word)
Code security for on-chip flash/SARAM/OTP blocks
Boot ROM (4K X16)
One-time programmable (OTP) ROM
(16-bit word)
PWM outputs (one 16-bit timer/module)
HRPWM channels
Watchdog timer
1K
ePWM1-16
ePWM1-16
Yes
16
12.5
80 ns
3
SPI-A
SCI-A
I
2
C-A
35
3
Yes
Yes
Yes
(PZ, GGM, ZGM)
TMS
No. of channels
MSPS
Conversion time
12-Bit ADC
32-Bit CPU timers
Serial Peripheral Interface (SPI)
Serial Communications Interface (SCI)
Inter-Integrated Circuit (I
2
C)
Digital I/O pins (shared)
External interrupts
Supply voltage
Packaging
1.8-V Core, 3.3-V I/O
100-Pin PZ
100-ball GGM, ZGM
A: -40
°
C to 85
°
C
Temperature options
Product status
(1)
(1)
See Section 5.1, Device and Development Support Nomenclature for descriptions of device stages.
The TMS320F28044 100-pin PZ low-profile quad flatpack (LQFP) pin assignments are shown in
Figure 2-1
. The 100-ball GGM and ZGM ball grid array (BGA) terminal assignments are shown in
Figure 2-2
.
Table 2-2
describes the function(s) of each pin.
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Introduction
11
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