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參數(shù)資料
| 型號： | TMS320AV411 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Digital NTSC/PAL Encoder(數(shù)字NTSC/PAL編碼器) |
| 中文描述： | 數(shù)字的NTSC / PAL編碼器（數(shù)字的NTSC / PAL編碼器） |
| 文件頁數(shù)： | 13/33頁 |
| 文件大?。?/td> | 634K |
| 代理商： | TMS320AV411 |
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TMS320AV410, TMS320AV411
DIGITAL NTSC/PAL ENCODER
SCSS020B – JULY 1996 – REVISED MAY 1997
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
I
2
C host interface mode
When the IFMOD1 and IFMOD0 pins are both low, the ’AV410/411 operates in the I
2
C compatible host interface
mode. The ’AV410/411 performs read and write operations according to the I
2
C specification and functions as
a slave-mode only device. The slave address may be selected from among two values, depending upon the
level of the AS pin. When AS is set low, the ‘AV410/411 I
2
C address is 0x88h. When AS is set high, the address
is 0x8Ch. When operating in the I
2
C host interface mode, the ’AV410/411 overlay function uses the colors set
in the lookup table. These colors must be set (via the YG, B, and R registers) at least once after powerup when
the overlay function is used.
I
2
C write
The I
2
C write is executed by sending (on SDA) the 7-bit slave address and write bit in the first byte following
the I
2
C start condition. After the acknowledge, the second byte entered specifies the beginning address for the
write. The data to write follows on successive bytes. The auto-increment function of the ’AV410/411 address
pointer allows consecutive data bytes to be entered until the I
2
C stop condition is received. Figure 10 illustrates
the I
2
C write operation.
0
Slave
Address
A
Register
Address
Register Address
Write Data
Register Address + 1
Write Data
A
A
A
Start
R/W
A: ACK
Figure 10. I
2
C Data Write
P
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