參數(shù)資料
型號: TMP320F28044GGMA
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processor
中文描述: 數(shù)字信號處理器
文件頁數(shù): 75/107頁
文件大小: 784K
代理商: TMP320F28044GGMA
www.ti.com
6.5
Emulator Connection Without Signal Buffering for the DSP
EMU0
EMU1
TRST
TMS
TDI
TDO
TCK
VDDIO
DSP
EMU0
EMU1
TRST
TMS
TDI
TDO
TCK
TCK_RET
13
14
2
1
3
7
11
9
6 inches or less
PD
GND
GND
GND
GND
GND
5
4
6
8
10
12
JTAG Header
VDDIO
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
Figure 6-1
shows the connection between the DSP and JTAG header for a single-processor configuration.
If the distance between the JTAG header and the DSP is greater than 6 inches, the emulation signals
must be buffered. If the distance is less than 6 inches, buffering is typically not needed.
Figure 6-1
shows
the simpler, no-buffering situation. For the pullup/pulldown resistor values, see the pin description section.
For details on buffering JTAG signals and multiple processor connections, see
TMS320F/C24x DSP
Controllers CPU and Instruction Set Reference Guide
(literature number SPRU160).
Figure 6-1. Emulator Connection Without Signal Buffering for the DSP
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Electrical Specifications
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