參數(shù)資料
型號(hào)： TLV5580PW
廠商： Texas Instruments, Inc.
英文描述： 8-BIT, 80 MSPS LOW-POWER A/D CONVERTER
中文描述： 8位，80 MSPS的低功耗A / D轉(zhuǎn)換器
文件頁(yè)數(shù)： 8/34頁(yè)
文件大?。?/td> 531K
代理商： TLV5580PW
TLV5580
8-BIT, 80 MSPS LOW-POWER A/D CONVERTER
SLAS205A – DECEMBER 1998 – REVISED JANUARY 1999
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions with f
CLK
= 80 MSPS and use
of external voltage references (unless otherwise noted) (continued)
dynamic performance
PARAMETER
TEST CONDITIONS
MIN
6.6
TYP
7.0
MAX
UNIT
fin = 1 MHz
fin = 4.43 MHz
fin = 15 MHz
fin = 76 MHz
fin = 1 MHz
fin = 4.43 MHz
fin = 15 MHz
fin = 76 MHz
fin = 1 MHz
fin = 4.43 MHz
fin = 15 MHz
fin = 76 MHz
fin = 1 MHz
fin = 4.43 MHz
fin = 15 MHz
fin = 76 MHz
See Note 4
Effective number of bits ENOB
Effective number of bits, ENOB
6.6
7.0
Bits
6.5
6.6
41.5
43.5
Signal to total harmonic distortion + noise S/(THD+N)
Signal-to-total harmonic distortion + noise, S/(THD+N)
41.5
43.5
dB
41
41.5
–46
–50
Total harmonic distortion (THD)
–45.5
–49
dB
–44
–45.5
48
53
Spurious free dynamic range (SFDR)
48
53
dB
46.5
48.5
Analog input full-power bandwidth, BW
700
MHz
Differential phase DP
Differential phase, DP
fclk = 40 MHz, fin
20 IRE amplitude vs. full-scale of 140 IRE
20 IRE am litude vs. full scale of 140 IRE
4 43 MH
0 8
0.8
°
Differential gain DG
Differential gain, DG
Based on analog input voltage of –1 dBFS referenced to a 1.3 Vpp full-scale input range and using the external voltage references at
fclk = 80 MSPS with AVDD = DVDD = 3.3 V and DRVDD = 3.0 V at 25
°
C.
NOTE 4: The analog input bandwidth is defined as the maximum frequency of a –1 dBFS input sine that can be applied to the device for which
an extra 3 dB attenuation is observed in the reconstructed output signal.
0 6
0.6
%
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