參數(shù)資料
型號(hào): TLV5535PW
廠商: Texas Instruments, Inc.
英文描述: 8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER
中文描述: 8位,35 MSPS的,低功耗模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 13/32頁(yè)
文件大?。?/td> 535K
代理商: TLV5535PW
TLV5535
8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER
SLAS221 – JUNE 1999
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
The TLV5535 implements a high-speed 35 MSPS converter in a cost-effective CMOS process. Powered from
3.3 V, the single-pipeline design architecture ensures low-power operation and 8-bit accuracy. Signal input and
clock signals are all single-ended. The digital inputs are 3.3-V TTL/CMOS compatible. Internal voltage
references are included for both bottom and top voltages. Therefore the converter forms a self-contained
solution. Alternatively, the user may apply externally generated reference voltages. In doing so, both input offset
and input range can be modified to suit the application.
A high-speed sampling-and-hold captures the analog input signal. Multiple stages generate the output code with
a pipeline delay of 4.5 CLK cycles. Correction logic combines the multistage data and aligns the 8-bit output
word. All digital logic operates at the rising edge of CLK.
analog input
A first-order approximation for the equivalent analog input circuit of the TLV5535 is shown in Figure 12. The
equivalent input capacitance C
I
is 4 pF typical. The input must charge/discharge this capacitance within the
sample period of one half clock cycle. When a full-scale voltage step is applied, the input source provides the
charging current through the switch resistance R
SW
(200
) of S1 and quickly settles. In this case, the input
impedance is low. Alternatively, when the source voltage equals the value previously stored on C
I
, the hold
capacitor requires no input current and the equivalent input impedance is very high.
To maintain the frequency performance outlined in the specifications, the total source impedance should be
limited to about 80
, as follows from the equation with f
CLK
= 35 MHz, C
I
= 4 pF, R
SW
= 200
:
RS
1
÷
2fCLK
CI
In(256) –R
SW
The source impedance is approximatly 450
.
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