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參數(shù)資料
| 型號： | TLC34076-170 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Color-Palette(170MHz,與TLC34075兼容，另具24位和16位真彩色模式) |
| 中文描述： | 顏色調(diào)色板（170MHz的，與TLC34075兼容，另具24位和16位真彩色模式） |
| 文件頁數(shù)： | 31/60頁 |
| 文件大?。?/td> | 408K |
| 代理商： | TLC34076-170 |
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2–14
2.4.6
The read mask register is used to enable or disable a pixel address bit from addressing the color palette
RAM. Each palette address bit is logically ANDed with the corresponding bit from the read mask register
before addressing the palette. This function is performed after the addition of the page register bits, and
therefore, a zeroing of the read mask results in one unique palette location (location 0) and is not affected
by the palette page register contents.
Read Masking
Note also that the read mask can be used to zero the overlay data in the true color modes. This is a
convenient way to disable overlay (enable true color data to the DACs) for a whole screen.
2.5
There are three ways to reset the TLC34076-170:
Reset
1.
2.
3.
Power-on reset
Hardware reset
Software reset
2.5.1
A power-on reset (POR) circuit is built into the TLC34076-170. This POR works at power on only. Even
though this circuitry is provided, it is still recommended for the user to design a hardware reset circuit to
ensure the reset condition after power up as described in Section 2.5.2.
Power-On Reset
Once the voltage has stabilized, the default condition for all registers is VGA mode. When the
TLC34076-170 is reset, the SCLK and VCLK counters are reset. See Sections 2.3 and 2.5.4.
2.5.2
The TLC34076-170 resets whenever RS<3:0> = HHHH and a rising edge occurs on the WR input. The more
rising WR edges occur, the more reliable the TLC34076-170 is reset. This scheme (bursting WR strobes
until the power supply voltage stabilizes) is suggested at power up if a hardware reset approach is used.
Hardware Reset
The default reset condition is the VGA mode, and the values for each register are shown in Section 2.5.4.
When the TLC34076-170 is reset, the SCLK and VCLK counters are reset. See Section 2.3.
2.5.3
Whenever the multiplex control register is set for the VGA pass-through mode after power up, all registers
are initialized accordingly. Since VGA pass-through mode is the default condition at power up and hardware
reset, the act of selecting the VGA pass-through mode through programming the multiplex control register
is viewed as a software reset. Therefore, whenever multiplex control register bits <5:0> are set to 2Dh, the
TLC34076-170 initiates a software reset. This also resets the SCLK and VCLK counters (see Section 2.3).
This is referred to as a software reset, since it is typically initiated by software, unlike POR or hardware
resets.
Software Reset
2.5.4
The value contained in each register after hardware or software reset is shown below:
VGA Pass-Through Mode Default Conditions
Multiplex control register:
Input clock selection register:
Output clock selection register:
Palette page register:
General control register:
Pixel read mask register:
Palette address register:
Palette holding register:
Test register:
2Dh
00h
3Fh
00h
03h
FFh
xxh
xxh
(pointing to color palette red value)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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