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參數(shù)資料
| 型號： | THC63LVDF64B |
| 廠商： | THine Electronics, Inc. |
| 英文描述： | LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE RECEIVER |
| 中文描述： | LVDS的24Bit/18Bit彩色主機- LCD面板接口接收器 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 167K |
| 代理商： | THC63LVDF64B |
Copyright 2001-2003 THine Electronics, Inc. All rights reserved 6
THine Electronics, Inc.
THC63LVDF84B/THC63LVDF64B _Rev2.0
Switching Characteristics
VCC= 2.5V ~ 3.6V, Ta = -10
~ +70
Symbo
l
Parameter
Min.
11.76
14.28
Typ.
T
T
Max.
50.0
50.0
Unit
s
ns
ns
t
RCP
CLK OUT Period
VCC = 3.0 - 3.6V
VCC = 2.5 - 3.6V
t
RCH
t
RCL
t
RCD
t
RS
t
RH
t
TLH
t
THL
t
RIP1
t
RIP0
t
RIP6
t
RIP5
t
RIP4
t
RIP3
t
RIP2
t
RPLL
CLK OUT High Time
4T/7
ns
CLK OUT Low Time
3T/7
ns
RCLK +/- to CLK OUT Delay
5T/7
ns
TTL Data Setup to CLK OUT
0.35T-0.3
ns
TTL Data Hold from CKL OUT
0.45T-1.6
ns
TTL Low to High Transition Time
2.0
3.0
ns
TTL High to Low Transition Time
1.8
3.0
ns
Input Data Position0 (T = 11.76ns)
-0.4
0.0
0.4
ns
Input Data Position1 (T = 11.76ns)
T/7-0.4
T/7
T/7+0.4
ns
Input Data Position2 (T = 11.76ns)
2T/7-0.4
2T/7
2T/7+0.4
ns
Input Data Position3 (T = 11.76ns)
3T/7-0.4
3T/7
3T/7+0.4
ns
Input Data Position4 (T = 11.76ns)
4T/7-0.4
4T/7
4T/7+0.4
ns
Input Data Position5 (T = 11.76ns)
5T/7-0.4
5T/7
5T/7+0.4
ns
Input Data Position6 (T = 11.76ns)
6T/7-0.4
6T/7
6T/7+0.4
ns
Phase Lock Loop Set
10.0
ms
°
C
°
C
AC Timing Diagrams
TTL Output
8pF
20%
80%
20%
80%
t
TLH
t
THL
TTL Output
TTL Output Load
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THC63LVDF84B | 制造商:THine Electronics Inc 功能描述: |
| THC63LVDM63R | 制造商:THINE 制造商全稱:THINE 功能描述:REDUCED SWING LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE |
| THC63LVDM83C-5S | 制造商:THine Electronics Inc 功能描述:Tray |
| THC63LVDM83D | 制造商:THine Electronics Inc 功能描述: |
| THC63LVDM83E | 制造商:THine Electronics Inc 功能描述:Tray |
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