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參數(shù)資料
| 型號： | TFP510PAPG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, HTQFP-64 |
| 文件頁數(shù)： | 27/27頁 |
| 文件大?。?/td> | 383K |
| 代理商： | TFP510PAPG4 |
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TFP510
TI PanelBus DIGITAL TRANSMITTER
SLDS146B JANUARY 2002 REVISED DECEMBER 2002
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional description
The TFP510 is a DVI-compliant digital transmitter that is used in digital host monitor systems to T.M.D.S. encode
and serialize RGB pixel data streams. TFP510 supports resolutions from VGA to UXGA and can be controlled
in two ways: 1) configuration and state pins or 2) the programmable I2C serial interface (see the terminal
functions section).
The host in a digital display system, usually a PC or consumer electronics device, contains a DVI-compatible
transmitter such as the TI TFP510 that receives 24-bit pixel data along with appropriate control signals. The
TFP510 encodes the signals into a high speed, low voltage, differential serial bit stream optimized for
transmission over a twisted-pair cable to a display device. The display device, usually a flat-panel monitor,
requires a DVI compatible receiver like the TI TFP501 to decode the serial bit stream back to the same 24-bit
pixel data and control signals that originated at the host. This decoded data can then be applied directly to the
flat panel drive circuitry to produce an image on the display. Since the host and display can be separated by
distances up to 5 meters or more, serial transmission of the pixel data is preferred (see the T.M.D.S. pixel data
and control signal encoding, pixel data and control signal encoding, universal graphics contoller interface
voltage signal levels, and unversal graphics controller interface clock inputs sections).
The TFP510 integrates a high-speed digital interface, an HDCP cipher, a T.M.D.S. encoder, and three
differential T.M.D.S. drivers. Data is driven to the TFP510 encoder across 12 or 24 data lines, along with
differential clock pair and sync signals. The flexibility of the TFP510 allows for multiple clock and data formats
that enhance system performance.
The TFP510 also has enhanced PLL noise immunity, an enhancement accomplished with on-chip regulators
and bypass capacitors.
The TFP510 is versatile and highly programmable to provide maximum flexibility for the user. An I2C host
interface is provided to allow enhanced configurations in addition to power-on default settings programmed by
pin-strapping resistors.
The TFP510 offers monitor detection through receiver detection, or hot-plug detection when I2C is enabled. The
monitor detection feature allows the user enhanced flexibility when attaching to digital displays or receivers (see
the terminal functions, hot-plug/unplug, and register descriptions sections).
The TFP510 has a data de-skew feature allowing the users to de-skew the input data with respect to the IDCK
±
(see the data de-skew feature section).
The TFP510 incorporates high-bandwidth digital content protection (HDCP). This provides secure data
transmission for high-definition video (see the HDCP overview section).
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