參數(shù)資料
型號(hào)： TDA9321H
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： I2C-bus controlled TV input processor
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： PLASTIC, QFP-64
文件頁(yè)數(shù)： 32/44頁(yè)
文件大?。?/td> 249K
代理商： TDA9321H
1998 Dec 16
32
Philips Semiconductors
Preliminary specification
I
2
C-bus controlled TV input processor
TDA9321H
12. The input conditions and test set-up are given in Figs 8 and 9. The figures are measured with an input signal of
10 mV (RMS value). The intermodulation figures are defined:
V
at 3.58 MHz
V
0
at 0.92 MHz
V
at 3.58 MHz
V
0
at 2.76 MHz
;
α
0.92
value at 0.92 MHz referenced to black or white signal;
;
α
2.76
value at 2.76 MHz referenced to colour carrier.
13. Measured at an input signal of 10 mV (RMS value). The S/N is the ratio of black-to-white amplitude with respect to
the black level noise voltage (RMS value). B = 5 MHz. Weighted in accordance with CCIR 567.
14. The AGC response time also depends on the acquisition time of the PLL demodulator. The values given are valid
when the PLL is in lock.
15. The AFC control voltage is obtained from the control voltage of the VCO of the PLL demodulator. The tuning
information is supplied to the tuning system via the I
2
C-bus. Two bits are reserved for this function. The AFC value
is valid only when bit PL = 1.
16. The weighted S/N ratio is measured under the following conditions:
a) The VIF modulator must meet the following specifications:
Incidental phase modulation for black-to-white jumps less than 0.5 degrees.
QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio)
better than 60 dB (deviation 27 kHz) for 6 kHz sine wave black-to-white modulation.
Picture-to-sound carrier ratio: PC/SC1 = 13 dB (transmitter).
b) The measurements must be carried out with the Siemens SAW filters G3962 for VIF and G9350 for SIF.
Input level for SIF at 10 mV (RMS value) with 27 kHz deviation.
c) The PC/SC ratio at the VIF input is calculated as the addition of the TV transmitter ratio and the SAW filter PC/SC
ratio. This PC/SC ratio is necessary to achieve the S/N
W
values as indicated.
17. Signal with negative-going sync. Amplitude includes sync pulse amplitude.
18. Indicated is a signal for a colour bar with 75% saturation (chrominance to burst amplitude ratio = 2.2 : 1).
19. When a signal is identified which can be combed (correct combination of colour standard and reference crystal) the
comb filter is switched to that mode via pins 25 and 27 and then the filter is activated by switching on the reference
carrier signal and connecting the output signals of the comb filter (pins 28 and 29) to the video processing circuits.
20. The subcarrier output signal can be used as a reference signal for external comb filter ICs (e.g. SAA4961). When
bit ECMB = 0 the subcarrier signal is suppressed and the DC level is LOW. When bit ECMB = 1 the output level is
HIGH and the subcarrier signal is present.
21. The outputs SYS1 and SYS2 can be used to switch the comb filter to the different colour standards (e.g. PAL-M,
PAL-N, PAL-B/G and NTSC-M) and are controlled by the colour decoder identification circuit.
The setting of the outputs for the various standards is given in Table 56.
22. For the detection of the status of the incoming SCART signal a voltage divider with a ratio of 2 : 3 has to be connected
between pin 8 of the SCART plug and the detection input. The impedance of the voltage divider should not be too
high-ohmic because of the input impedance of 100 k
.
23. When the decoder is forced to a fixed subcarrier frequency (via bits XA to XD or bit CM) the chrominance trap is
always switched on, also when no colour signal is identified. When 2 crystals are active the chrominance trap is
switched off if no colour signal is identified.
24. The typical group delay characteristic for the B/G standard is given in Fig.7.
25. At a chrominance input voltage of 660 mV (p-p) [colour bar with 75% saturation i.e. burst signal amplitude
300 mV (p-p)] the dynamic range of the ACC is +6 and
20 dB.
26. The ACL function can be activated by bit ACL. The ACL circuit reduces the gain of the chrominance amplifier for input
signals with a C/C
ACL
which exceeds a value of 3.0.
α
0.92
20
--------------------------------------
3.6 dB
+
log
=
α
2.76
20
--------------------------------------
log
=
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