參數(shù)資料
型號(hào)： TDA6500TT
廠商： NXP SEMICONDUCTORS
元件分類： 調(diào)諧器
英文描述： 5 V mixer/oscillator and synthesizer for PAL and NTSC standards
中文描述： 3-BAND, VIDEO TUNER, PDSO32
封裝： 6.10 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT487-1, TSSOP-32
文件頁(yè)數(shù)： 7/37頁(yè)
文件大?。?/td> 223K
代理商： TDA6500TT
9397 750 15057
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 14 June 2005
7 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
pulse, the control register is loaded with data from byte CB after the 8th SCL clock pulse,
the band switch register is loaded with data of byte BB after the 8th SCL clock pulse and
the auxiliary register is loaded with data of byte AB after the 8th SCL clock pulse.
To program the AGC take-over point setting and the AGC current to a different value than
the default value, an additional byte, the auxiliary byte, has to be sent. To this end, the
auxiliary byte is preceded by a control byte with the test bits T2, T1 and T0 set to logic 011
(see
Table 8
).
[1]
Auxiliary byte AB replaces band switch byte BB when bit T2 = 0, T1 = 1 and T0 = 1.
Table 5:
Name
I
2
C-bus data format for write mode
Byte
Bit
MSB
Address byte
ADB
Divider byte 1
DB1
Divider byte 2
DB2
Control byte
CB
Band switch byte BB
Auxiliary byte
[1]
AB
Ack
LSB
R/W = 0 A
N8
N0
OS
P0
0
1
0
N7
1
0
ATC
1
N14
N6
CP
P6
AL2
0
N13
N5
T2
0
AL1
0
N12
N4
T1
P4
AL0
0
N11
N3
T0
P3
0
MA1
N10
N2
RSA
P2
0
MA0
N9
N1
RSB
P1
0
A
A
A
A
A
Table 6:
Symbol
A
MA1 and MA0
R/W
N14 to N0
Description of bits shown in
Table 5
Description
acknowledge
programmable address bits; see
Table 7
logic 0 for write mode
programmable divider bits;
N = (N14
×
2
14
) + (N13
×
2
13
) + ... + (N1
×
2
1
) + N0
charge pump current
CP = 0: the charge pump current is 60
μ
A
CP = 1: the charge pump current is 280
μ
A (default)
T2, T1 and T0
test bits; see
Table 8
RSA and RSB
reference divider ratio select bits; see
Table 9
OS
tuning amplifier control bit
OS = 0: normal operation; tuning voltage is on
OS = 1: tuning voltage is off; high-impedance state (default)
P6 and P4
NPN port control bits
Pn = 0: port n is off; high-impedance state (default)
Pn = 1: buffer n is on; V
O
= V
CE(sat)
P3 to P0
PMOS port control bits
Pn = 0: port n is off; high-impedance state (default)
Pn = 1: buffer n is on; V
O
= V
CC
V
DS(sat)
ATC
AGC time constant
ATC = 0: I
AGC
= 220 nA;
t = 2 s with C = 160 nF (default)
ATC = 1: I
AGC
= 9
μ
A;
t = 50 ms with C = 160 nF
AL2, AL1 and AL0
AGC take-over point bits; see
Table 10
CP
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