參數(shù)資料
型號(hào): TC1307
廠商: Microchip Technology Inc.
英文描述: Four-Channel CMOS LDO with Select Mode, Shutdown and Independent Reset
中文描述: 四通道CMOS低壓降穩(wěn)壓器的選擇模式,關(guān)機(jī)和獨(dú)立復(fù)位
文件頁數(shù): 17/28頁
文件大?。?/td> 553K
代理商: TC1307
2002 Microchip Technology Inc.
DS21702A-page 17
TC1307
5.4.1
P-CHANNEL LINEAR PASS DEVICE
Where:
P
Linear
= Power dissipated in the LDO P-Channel
linear pass element.
V
IN(MAX)
= Maximum input voltage (V
IN
)
V
OUT(MAX)
= Minimum LDO output Voltage (V
OUT
)
I
OUT(MAX)
= Maximum LDO output current
5.4.2
QUIESCENT CURRENT
The quiescent current consumed by the TC1307 has
two components. The quiescent current required to
bias the LDO regulators and the quiescent current
required to bias the voltage detection circuitry. To deter-
mine the power dissipation as a result of the total
device quiescent current both the maximum input volt-
age on the V
IN
and V
DET
inputs should be used.
Where:
P
Q
= Power internal to the LDO as a result of inter-
nal biasing
V
IN
= Input voltage
I
IN
= Input current when all load currents = 0 mA
V
DET
= Detect Input Voltage
I
VDET
= Voltage detect input pin current
5.4.3
RESET OUTPUT
The power dissipation for the RESET output driver can
be a result of the sinking current or sourcing current
depending on the state of the output.
Where:
P
RESET
= Power dissipated as a result of the
RESET output.
V
OL
= RESET low output voltage
I
SINK
= RESET sink current
The power dissipation internal to the RESET output
due to sourcing current can be calculated by using the
following equation.
Where:
P
RESET
= Power dissipation as a result of RESET
output while in the high state
V
DET
= Detect Voltage
V
SOURCE
= RESET output pin voltage while in the
high state
I
SOURCE
= Output current being sourced
5.4.4
TOTAL INTERNAL POWER DISSIPATION
The total power dissipated within the TC1307 is the
sum of the power dissipated in each of the four LDOs,
the P
Q
term and the P
RESET
term (either sinking or
sourcing). Because of the CMOS construction, the typ-
ical I
IN
for the TC1307 is 220 μA. When operating at a
maximum of 5V this results is a power dissipation of
1.2 milli-Watts. For most applications this is small com-
pared to the LDO pass device power dissipation and
can be neglected. The P
RESET
term for a typical 3.2 mA
sinking application will dissipate a maximum of 3.2 mA
x 0.4V or 1.28 milli-Watts. A typical sourcing applica-
tion of 800 μA will have a maximum 1.5V drop from the
VDET voltage will dissipate a maximum of 800 μA x
1.5V or 1.2 milli-Watts. Again for most applications this
is small compared to the LDO pass device power dissi-
pation and can be neglected.
5.4.5
MAXIMUM JUNCTION TEMPERATURE
The operating junction temperature (T
J
) specified for
the TC1307 is 125
°
C
.
To estimate the internal junction
temperature of the TC1307, the total internal power dis-
sipation (P
TOTAL
) is multiplied by the thermal resistance
from junction to ambient (
θ
JA
) of the device. The ther-
mal resistance from junction to ambient for the QSOP
16-pin package is estimated at 112.4
°
C/W. The actual
thermal resistance from junction to air can vary from
application to application for the QSOP16 depending
on board copper area, copper thickness, airflow and
other external environmental factors.
The maximum power dissipation capability for a pack-
age (P
D(MAX)
) can be calculated given the junction to
air thermal resistance and the maximum ambient tem-
perature (T
A(MAX)
) for the application. The following
equation can be used to determine the package maxi-
mum internal power dissipation.
P
Linear
V
IN MAX
)
V
OUT MIN
)
(
)
I
OUT MAX
)
×
=
P
Q
V
IN
I
IN
×
V
DET
I
DET
×
+
=
P
RESET
V
OL
I
SINK
×
=
P
RESET
V
DET
V
SOURCE
(
)
I
SOURCE
×
=
P
TOTAL
P
Linear
P
+
Q
P
RESET
+
=
T
J MAX
)
P
TOTAL
θ
JA
×
=
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