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參數(shù)資料
| 型號： | SY100E195 |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | Programmable Delay Chip(可編程延遲芯片) |
| 中文描述： | 可編程延時芯片（可編程延遲芯片） |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 75K |
| 代理商： | SY100E195 |
4
ClockWorks
SY10E195
SY100E195
Micrel
T
A
= 0
°
C
T
A
= +25
°
C
T
A
= +85
°
C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
t
PLH
t
PHL
Propagation Delay to Output
IN to Q; Tap = 0
IN to Q; Tap = 127
EN to Q; Tap = 0
D
7
to CASCADE
ps
—
1210
3320
1250
300
1360
3570
1450
450
1510
3820
1650
700
1240
3380
1275
300
1390
3630
1475
450
1540
3880
1675
700
1440
3920
1350
300
1590
4270
1650
450
1765
4720
1950
700
t
RANGE
Programmable Range
t
PD
(max.) – t
PD
(min.)
2000
2175
—
2050
2240
—
2375
2580
—
ps
—
t
Step Delay
D
0
High
D
1
High
D
2
High
D
3
High
D
4
High
D
5
High
D
6
High
ps
6
—
—
55
115
250
505
1000
17
34
68
136
272
544
1088
—
—
105
180
325
620
1190
—
—
55
115
250
515
1030
17.5
35
70
140
280
560
1120
—
—
105
180
325
620
1220
—
—
65
140
305
620
1240
21
42
84
168
336
672
1344
—
—
120
205
380
740
1450
Lin
Linearity
D
1
D
0
—
D
1
D
0
—
D
1
D
0
—
—
7
t
skew
Duty Cycle Skew, t
PHL
–t
PLH
—
±
30
—
—
±
30
—
—
±
30
—
ps
1
t
S
Set-up Time
D to LEN
D to IN
EN to IN
ps
200
800
200
0
—
—
—
—
—
200
800
200
0
—
—
—
—
—
200
800
200
0
—
—
—
—
—
2
3
t
H
Hold Time
LEN to D
IN to EN
ps
500
0
250
—
—
—
500
0
250
—
—
—
500
0
250
—
—
—
4
t
R
Release Time
EN to IN
SET MAX to LEN
SET MIN to LEN
ps
300
800
800
—
—
—
—
—
—
300
800
800
—
—
—
—
—
—
300
800
800
—
—
—
—
—
—
5
t
jit
Jitter
—
<5
—
—
<5
—
—
<5
—
ps
8
t
r
t
f
Rise/Fall Times
20–80% (Q)
20–80% (CASCADE)
ps
—
125
300
225
450
325
650
125
300
225
450
325
650
125
300
225
450
325
650
NOTES:
2. Duty cycle skew guaranteed only for differential operation measured from the cross point of the input to the cross point of the output.
3. This set-up time defines the amount of time prior to the input signal the delay tap of the device must be set.
4. This set-up time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than
±
75mV to
that IN/IN transition.
5. This hold time is the minimum time that EN must remain asserted after a negative going IN or positive going IN to prevent an output response greater than
±
75mV to that IN/IN transition.
6. This release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets the specified
IN to Q propagation delay and transition times.
7. Specification limits represent the amount of delay added with the assertion of each individual delay control pin. The various combinations of asserted delay
control inputs will typically realize D
0
resolution steps across the specified programmable range.
8. The linearity specification guarantees to which delay control input the programmable steps will be monotonic (i.e. increasing delay steps for increasing
binary counts on the control inputs D
n
). Typically, the device will be monotonic to the D
0
input, however, under worst case conditions and process variation,
delays could decrease slightly with increasing binary counts when the D
0
input is the LSB. With the D
1
input as the LSB, the device is guaranteed to be
monotonic over all specified environmental conditions and process variation.
9. The jitter of the device is less than what can be measured without resorting to very tedious and specialized measurement techniques.
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= GND
AC ELECTRICAL CHARACTERISTICS
相關PDF資料 |
PDF描述 |
|---|---|
| SY10E195 | Programmable Delay Chip(可編程延遲芯片) |
| SY10E196JCTR | PROGRAMMABLE DELAY CHIP WITH ANALOG INPUT |
| SY100E196 | Programmable Delay Chip with Analog Input(可編程延遲芯片（帶邏輯輸入）) |
| SY10E196 | Programmable Delay Chip with Analog Input(可編程延遲芯片（帶邏輯輸入）) |
| SY10E196JC | PROGRAMMABLE DELAY CHIP WITH ANALOG INPUT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E195JC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:RF Micro Devices Inc 功能描述: |
| SY100E195JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROGRAMMABLE DELAY CHIP |
| SY100E195JI | 功能描述:IC DELAY LINE 128TAP 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 延遲線 系列:100E, Precision Edge® 標準包裝:2,500 系列:- 標片/步級數(shù):- 功能:多個，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨立延遲數(shù):4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY100E195JI TR | 功能描述:IC DELAY LINE 128TAP 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 延遲線 系列:100E, Precision Edge® 標準包裝:2,500 系列:- 標片/步級數(shù):- 功能:多個，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨立延遲數(shù):4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY100E195JITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROGRAMMABLE DELAY CHIP |
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