參數(shù)資料
型號: STM32F103VEH6
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PBGA100
封裝: 10 X 10 MM, 0.50 MM PITCH, ROHS COMPLIANT, LFBGA-100
文件頁數(shù): 113/115頁
文件大小: 1225K
代理商: STM32F103VEH6
STM32F103xC, STM32F103xD, STM32F103xE
Electrical characteristics
Figure 52.
Typical connection diagram using the ADC
1.
Refer to Table 58 for the values of RAIN, RADC and CADC.
2.
Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy
this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 53 or Figure 54,
depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 53.
Power supply and reference decoupling (VREF+ not connected to VDDA)
1.
VREF+ and VREF– inputs are available only on 100-pin packages.
ai14150c
STM32F103xx
VDD
AINx
IL±1 A
0.6 V
VT
RAIN(1)
Cparasitic
VAIN
0.6 V
VT
RADC(1)
12-bit
converter
CADC(1)
Sample and hold ADC
converter
VREF+
(see note 1)
STM32F103xx
VDDA
VSSA /VREF–
(see note 1)
1 F // 10 nF
ai14388b
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