參數(shù)資料
型號(hào)： STM32F103RCH7XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PBGA64
封裝： ROHS COMPLIANT, LFBGA-64
文件頁數(shù)： 98/115頁
文件大?。?/td> 1225K
代理商： STM32F103RCH7XXX
STM32F103xC, STM32F103xD, STM32F103xE
Electrical characteristics
Figure 41.
Recommended NRST pin protection
2.
The reset network protects the device against parasitic resets.
3.
The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 48. Otherwise the reset will not be taken into account by the device.
5.3.15
TIM timer characteristics
The parameters given in Table 49 are guaranteed by design.
Refer to Section 5.3.13: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
ai14132b
STM32F101xx
RPU
NRST
VDD
FILTER
Internal Reset
0.1 F
External
reset circuit
Table 49.
TIMx(1) characteristics
1.
TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers.
Symbol
Parameter
Conditions
Min
Max
Unit
tres(TIM)
Timer resolution time
1
tTIMxCLK
fTIMxCLK = 72 MHz
13.9
ns
fEXT
Timer external clock
frequency on CH1 to CH4
0
fTIMxCLK/2
MHz
fTIMxCLK = 72 MHz
0
36
MHz
ResTIM
Timer resolution
16
bit
tCOUNTER
16-bit counter clock period
when internal clock is
selected
1
65536
tTIMxCLK
fTIMxCLK = 72 MHz 0.0139
910
s
tMAX_COUNT Maximum possible count
65536 × 65536
tTIMxCLK
fTIMxCLK = 72 MHz
59.6
s
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